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From: "Su, David W" <david.w.su@intel.com>
To: Stephen Hemminger <stephen@networkplumber.org>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [PATCH] igb_uio: use non-threaded ISR
Date: Mon, 23 Jan 2017 19:20:02 +0000	[thread overview]
Message-ID: <3875C02542CA2945BF761013C1F5B8E57F3DC9AD@ORSMSX109.amr.corp.intel.com> (raw)
In-Reply-To: <20170120155058.5177efc4@xeon-e3>

If rte_eth_conf.intr_conf.rxq != 0 and rte_eth_conf.intr_conf.lsc = 0 when rte_eth_dev_configure() is called, rx queue interrupts can be enabled/disabled with rte_eth_dev_rx_intr_{enable|disable} and DPDK applications can wait for rx queue interrupts with rte_epoll_wait().  This is the case for both igb_uio and vfio-pci drivers.

vfio-pci already uses non-threaded ISR, but currently we can only use igb_uio when running DPDK applications in virtual machines.

David
  

-----Original Message-----
From: Stephen Hemminger [mailto:stephen@networkplumber.org] 
Sent: Friday, January 20, 2017 3:51 PM
To: Su, David W <david.w.su@intel.com>
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH] igb_uio: use non-threaded ISR

On Fri, 20 Jan 2017 15:08:19 -0800
David Su <david.w.su@intel.com> wrote:

> This eliminates the overhead of a task switch when an interrupt arrives.
> 
> Signed-off-by: David Su <david.w.su@intel.com>
> ---
>  lib/librte_eal/linuxapp/igb_uio/igb_uio.c |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
> 
> diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
> index df41e45..9338e14 100644
> --- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
> +++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c
> @@ -382,6 +382,7 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
>  		msix_entry.entry = 0;
>  		if (pci_enable_msix(dev, &msix_entry, 1) == 0) {
>  			dev_dbg(&dev->dev, "using MSI-X");
> +			udev->info.irq_flags = IRQF_NO_THREAD;
>  			udev->info.irq = msix_entry.vector;
>  			udev->mode = RTE_INTR_MODE_MSIX;
>  			break;
> @@ -390,7 +391,7 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
>  	case RTE_INTR_MODE_LEGACY:
>  		if (pci_intx_mask_supported(dev)) {
>  			dev_dbg(&dev->dev, "using INTX");
> -			udev->info.irq_flags = IRQF_SHARED;
> +			udev->info.irq_flags = IRQF_SHARED | IRQF_NO_THREAD;
>  			udev->info.irq = dev->irq;
>  			udev->mode = RTE_INTR_MODE_LEGACY;
>  			break;

Since interrupts are only used for link state transistions with igb_uio,
I can't see how the overhead of task switch would matter.

  reply	other threads:[~2017-01-23 19:20 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-20 23:08 [PATCH] igb_uio: use non-threaded ISR David Su
2017-01-20 23:50 ` Stephen Hemminger
2017-01-23 19:20   ` Su, David W [this message]
2017-01-23 21:12     ` Stephen Hemminger
2017-02-24 17:54 ` Ferruh Yigit
2017-02-25  0:21   ` Su, David W
2017-02-27 16:15 ` Ferruh Yigit
2017-03-30 20:28   ` Thomas Monjalon

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