From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758241AbcHYI4K (ORCPT ); Thu, 25 Aug 2016 04:56:10 -0400 Received: from mga03.intel.com ([134.134.136.65]:42444 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756773AbcHYI4I (ORCPT ); Thu, 25 Aug 2016 04:56:08 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,575,1464678000"; d="scan'208";a="1046968481" Subject: Re: [PATCH 2/2] sdhci-of-arasan: Add quirk and device tree parameter to fake CD bit To: Zach Brown References: <1472080984-17373-1-git-send-email-zach.brown@ni.com> <1472080984-17373-2-git-send-email-zach.brown@ni.com> Cc: robh+dt@kernel.org, ulf.hansson@linaro.org, mark.rutland@arm.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, michal.simek@xilinx.com, soren.brinkmann@xilinx.com, linux-arm-kernel@lists.infradead.org From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <38d4d636-dc98-cc3b-3397-75924200ef9f@intel.com> Date: Thu, 25 Aug 2016 11:50:07 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1472080984-17373-2-git-send-email-zach.brown@ni.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/08/16 02:23, Zach Brown wrote: > The sdhci controller on xilinx zynq devices will not function unless > the cd bit is provided. http://www.xilinx.com/support/answers/61064.html > In cases where it is impossible to provide the cd bit in hardware, > setting the controller to test mode and then setting inserted to true > will get the controller to function with out the cd bit. with out -> without > > The device property "fake-cd" will let the arasan driver know it needs > to fake the cd bit for the controller inorder for the controller to inorder -> in order > function with a SD card that does not provide the CD bit. Please use either 'cd' or 'CD' consistently. > > Signed-off-by: Zach Brown > --- > drivers/mmc/host/sdhci-of-arasan.c | 23 ++++++++++++++++++++++- > drivers/mmc/host/sdhci.h | 4 ++++ > 2 files changed, 26 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index e0f193f..a74bcf5 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -26,6 +26,7 @@ > #include > #include > #include "sdhci-pltfm.h" > +#include > > #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c > #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 > @@ -203,12 +204,26 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, > writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); > } > > +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) > +{ > + u8 ctrl; > + > + sdhci_reset(host, mask); > + > + if (host->quirks2 & SDHCI_QUIRK2_NEED_FAKE_CD) { > + ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL); Is there a reason this is sdhci_readl instead of sdhci_readb > + ctrl |= SDHCI_CTRL_CD_TEST_INSERTED | > + SDHCI_CTRL_CD_TEST_ENABLE; Please indent SDHCI_CTRL_CD_TEST_ENABLE > + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); > + } > +} > + > static struct sdhci_ops sdhci_arasan_ops = { > .set_clock = sdhci_arasan_set_clock, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_arasan_get_timeout_clock, > .set_bus_width = sdhci_set_bus_width, > - .reset = sdhci_reset, > + .reset = sdhci_arasan_reset, > .set_uhs_signaling = sdhci_set_uhs_signaling, > }; > > @@ -516,6 +531,12 @@ static int sdhci_arasan_probe(struct platform_device *pdev) > } > > sdhci_get_of_property(pdev); > + > + if (of_get_property(pdev->dev.of_node, "fake-cd", NULL)) > + host->quirks2 |= SDHCI_QUIRK2_NEED_FAKE_CD; Please don't use a quirk bit for this. Instead add a flag to, for example, struct sdhci_arasan_data. > + > + pltfm_host = sdhci_priv(host); > + pltfm_host->priv = sdhci_arasan; These 2 lines don't belong. > pltfm_host->clk = clk_xin; > > sdhci_arasan_update_baseclkfreq(host); > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index 0411c9f..ff3c8ba 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -84,6 +84,8 @@ > #define SDHCI_CTRL_ADMA32 0x10 > #define SDHCI_CTRL_ADMA64 0x18 > #define SDHCI_CTRL_8BITBUS 0x20 > +#define SDHCI_CTRL_CD_TEST_INSERTED 0x40 > +#define SDHCI_CTRL_CD_TEST_ENABLE 0x80 For the sake of neatness, let's make these a little more abbreviated, say: SDHCI_CTRL_CDTEST_INS SDHCI_CTRL_CDTEST_EN > > #define SDHCI_POWER_CONTROL 0x29 > #define SDHCI_POWER_ON 0x01 > @@ -422,6 +424,8 @@ struct sdhci_host { > #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) > /* Broken Clock divider zero in controller */ > #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) > +/* Controller needs the cd bit faked */ > +#define SDHCI_QUIRK2_NEED_FAKE_CD (1<<16) > > int irq; /* Device IRQ */ > void __iomem *ioaddr; /* Mapped address */ > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adrian Hunter Subject: Re: [PATCH 2/2] sdhci-of-arasan: Add quirk and device tree parameter to fake CD bit Date: Thu, 25 Aug 2016 11:50:07 +0300 Message-ID: <38d4d636-dc98-cc3b-3397-75924200ef9f@intel.com> References: <1472080984-17373-1-git-send-email-zach.brown@ni.com> <1472080984-17373-2-git-send-email-zach.brown@ni.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1472080984-17373-2-git-send-email-zach.brown@ni.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Zach Brown Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, michal.simek@xilinx.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, soren.brinkmann@xilinx.com List-Id: devicetree@vger.kernel.org On 25/08/16 02:23, Zach Brown wrote: > The sdhci controller on xilinx zynq devices will not function unless > the cd bit is provided. http://www.xilinx.com/support/answers/61064.html > In cases where it is impossible to provide the cd bit in hardware, > setting the controller to test mode and then setting inserted to true > will get the controller to function with out the cd bit. with out -> without > > The device property "fake-cd" will let the arasan driver know it needs > to fake the cd bit for the controller inorder for the controller to inorder -> in order > function with a SD card that does not provide the CD bit. Please use either 'cd' or 'CD' consistently. > > Signed-off-by: Zach Brown > --- > drivers/mmc/host/sdhci-of-arasan.c | 23 ++++++++++++++++++++++- > drivers/mmc/host/sdhci.h | 4 ++++ > 2 files changed, 26 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index e0f193f..a74bcf5 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -26,6 +26,7 @@ > #include > #include > #include "sdhci-pltfm.h" > +#include > > #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c > #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 > @@ -203,12 +204,26 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, > writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); > } > > +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) > +{ > + u8 ctrl; > + > + sdhci_reset(host, mask); > + > + if (host->quirks2 & SDHCI_QUIRK2_NEED_FAKE_CD) { > + ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL); Is there a reason this is sdhci_readl instead of sdhci_readb > + ctrl |= SDHCI_CTRL_CD_TEST_INSERTED | > + SDHCI_CTRL_CD_TEST_ENABLE; Please indent SDHCI_CTRL_CD_TEST_ENABLE > + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); > + } > +} > + > static struct sdhci_ops sdhci_arasan_ops = { > .set_clock = sdhci_arasan_set_clock, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_arasan_get_timeout_clock, > .set_bus_width = sdhci_set_bus_width, > - .reset = sdhci_reset, > + .reset = sdhci_arasan_reset, > .set_uhs_signaling = sdhci_set_uhs_signaling, > }; > > @@ -516,6 +531,12 @@ static int sdhci_arasan_probe(struct platform_device *pdev) > } > > sdhci_get_of_property(pdev); > + > + if (of_get_property(pdev->dev.of_node, "fake-cd", NULL)) > + host->quirks2 |= SDHCI_QUIRK2_NEED_FAKE_CD; Please don't use a quirk bit for this. Instead add a flag to, for example, struct sdhci_arasan_data. > + > + pltfm_host = sdhci_priv(host); > + pltfm_host->priv = sdhci_arasan; These 2 lines don't belong. > pltfm_host->clk = clk_xin; > > sdhci_arasan_update_baseclkfreq(host); > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index 0411c9f..ff3c8ba 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -84,6 +84,8 @@ > #define SDHCI_CTRL_ADMA32 0x10 > #define SDHCI_CTRL_ADMA64 0x18 > #define SDHCI_CTRL_8BITBUS 0x20 > +#define SDHCI_CTRL_CD_TEST_INSERTED 0x40 > +#define SDHCI_CTRL_CD_TEST_ENABLE 0x80 For the sake of neatness, let's make these a little more abbreviated, say: SDHCI_CTRL_CDTEST_INS SDHCI_CTRL_CDTEST_EN > > #define SDHCI_POWER_CONTROL 0x29 > #define SDHCI_POWER_ON 0x01 > @@ -422,6 +424,8 @@ struct sdhci_host { > #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) > /* Broken Clock divider zero in controller */ > #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) > +/* Controller needs the cd bit faked */ > +#define SDHCI_QUIRK2_NEED_FAKE_CD (1<<16) > > int irq; /* Device IRQ */ > void __iomem *ioaddr; /* Mapped address */ > From mboxrd@z Thu Jan 1 00:00:00 1970 From: adrian.hunter@intel.com (Adrian Hunter) Date: Thu, 25 Aug 2016 11:50:07 +0300 Subject: [PATCH 2/2] sdhci-of-arasan: Add quirk and device tree parameter to fake CD bit In-Reply-To: <1472080984-17373-2-git-send-email-zach.brown@ni.com> References: <1472080984-17373-1-git-send-email-zach.brown@ni.com> <1472080984-17373-2-git-send-email-zach.brown@ni.com> Message-ID: <38d4d636-dc98-cc3b-3397-75924200ef9f@intel.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 25/08/16 02:23, Zach Brown wrote: > The sdhci controller on xilinx zynq devices will not function unless > the cd bit is provided. http://www.xilinx.com/support/answers/61064.html > In cases where it is impossible to provide the cd bit in hardware, > setting the controller to test mode and then setting inserted to true > will get the controller to function with out the cd bit. with out -> without > > The device property "fake-cd" will let the arasan driver know it needs > to fake the cd bit for the controller inorder for the controller to inorder -> in order > function with a SD card that does not provide the CD bit. Please use either 'cd' or 'CD' consistently. > > Signed-off-by: Zach Brown > --- > drivers/mmc/host/sdhci-of-arasan.c | 23 ++++++++++++++++++++++- > drivers/mmc/host/sdhci.h | 4 ++++ > 2 files changed, 26 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index e0f193f..a74bcf5 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -26,6 +26,7 @@ > #include > #include > #include "sdhci-pltfm.h" > +#include > > #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c > #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 > @@ -203,12 +204,26 @@ static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, > writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER); > } > > +void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) > +{ > + u8 ctrl; > + > + sdhci_reset(host, mask); > + > + if (host->quirks2 & SDHCI_QUIRK2_NEED_FAKE_CD) { > + ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL); Is there a reason this is sdhci_readl instead of sdhci_readb > + ctrl |= SDHCI_CTRL_CD_TEST_INSERTED | > + SDHCI_CTRL_CD_TEST_ENABLE; Please indent SDHCI_CTRL_CD_TEST_ENABLE > + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); > + } > +} > + > static struct sdhci_ops sdhci_arasan_ops = { > .set_clock = sdhci_arasan_set_clock, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_arasan_get_timeout_clock, > .set_bus_width = sdhci_set_bus_width, > - .reset = sdhci_reset, > + .reset = sdhci_arasan_reset, > .set_uhs_signaling = sdhci_set_uhs_signaling, > }; > > @@ -516,6 +531,12 @@ static int sdhci_arasan_probe(struct platform_device *pdev) > } > > sdhci_get_of_property(pdev); > + > + if (of_get_property(pdev->dev.of_node, "fake-cd", NULL)) > + host->quirks2 |= SDHCI_QUIRK2_NEED_FAKE_CD; Please don't use a quirk bit for this. Instead add a flag to, for example, struct sdhci_arasan_data. > + > + pltfm_host = sdhci_priv(host); > + pltfm_host->priv = sdhci_arasan; These 2 lines don't belong. > pltfm_host->clk = clk_xin; > > sdhci_arasan_update_baseclkfreq(host); > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index 0411c9f..ff3c8ba 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -84,6 +84,8 @@ > #define SDHCI_CTRL_ADMA32 0x10 > #define SDHCI_CTRL_ADMA64 0x18 > #define SDHCI_CTRL_8BITBUS 0x20 > +#define SDHCI_CTRL_CD_TEST_INSERTED 0x40 > +#define SDHCI_CTRL_CD_TEST_ENABLE 0x80 For the sake of neatness, let's make these a little more abbreviated, say: SDHCI_CTRL_CDTEST_INS SDHCI_CTRL_CDTEST_EN > > #define SDHCI_POWER_CONTROL 0x29 > #define SDHCI_POWER_ON 0x01 > @@ -422,6 +424,8 @@ struct sdhci_host { > #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) > /* Broken Clock divider zero in controller */ > #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) > +/* Controller needs the cd bit faked */ > +#define SDHCI_QUIRK2_NEED_FAKE_CD (1<<16) > > int irq; /* Device IRQ */ > void __iomem *ioaddr; /* Mapped address */ >