From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S932540AbcIMTLB (ORCPT <rfc822;w@1wt.eu>);
        Tue, 13 Sep 2016 15:11:01 -0400
Received: from mga07.intel.com ([134.134.136.100]:43338 "EHLO mga07.intel.com"
        rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
        id S932461AbcIMTK6 (ORCPT <rfc822;linux-kernel@vger.kernel.org>);
        Tue, 13 Sep 2016 15:10:58 -0400
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.30,330,1470726000"; 
   d="scan'208";a="1029450199"
From: "Luck, Tony" <tony.luck@intel.com>
To: Nilay Vaish <nilayvaish@gmail.com>,
        "Yu, Fenghua" <fenghua.yu@intel.com>
CC: Thomas Gleixner <tglx@linutronix.de>,
        "Anvin, H Peter" <h.peter.anvin@intel.com>,
        Ingo Molnar <mingo@elte.hu>, Peter Zijlstra <peterz@infradead.org>,
        Tejun Heo <tj@kernel.org>, Borislav Petkov <bp@suse.de>,
        Stephane Eranian <eranian@google.com>,
        Marcelo Tosatti <mtosatti@redhat.com>,
        David Carrillo-Cisneros <davidcc@google.com>,
        "Shaohua Li" <shli@fb.com>,
        "Shankar, Ravi V" <ravi.v.shankar@intel.com>,
        "Vikas Shivappa" <vikas.shivappa@linux.intel.com>,
        "Prakhya, Sai Praneeth" <sai.praneeth.prakhya@intel.com>,
        linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: RE: [PATCH v2 11/33] x86/intel_rdt: Hot cpu support for Cache
 Allocation
Thread-Topic: [PATCH v2 11/33] x86/intel_rdt: Hot cpu support for Cache
 Allocation
Thread-Index: AQHSCZ5mVgHXRR5ILku/+qn0wM35cKB4OIGA//+YFYA=
Date: Tue, 13 Sep 2016 19:10:57 +0000
Message-ID: <3908561D78D1C84285E8C5FCA982C28F3A1C8FA1@ORSMSX114.amr.corp.intel.com>
References: <1473328647-33116-1-git-send-email-fenghua.yu@intel.com>
 <1473328647-33116-12-git-send-email-fenghua.yu@intel.com>
 <CACbG308CdRCMuW5TzGXj=r5hO5YDF3qhoo9UYZfDP9Hcd06BGg@mail.gmail.com>
In-Reply-To: <CACbG308CdRCMuW5TzGXj=r5hO5YDF3qhoo9UYZfDP9Hcd06BGg@mail.gmail.com>
Accept-Language: en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-originating-ip: [10.22.254.138]
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Transfer-Encoding: 8bit
X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id u8DJB4xT025316

> Just for my info, why do we need not update MSRs when a cpu goes offline?

The CBM (cache bitmask) MSRs are shared by all the cpus that use that same cache. So
they mustn't be updated when some of the CPUs go offline, because the remaining ones
are still using them. I suppose you could do something if the last CPU using a cache goes
offline ... but I don't see that it would achieve anything. Offline CPUs aren't executing any
instructions, so don't do any cache allocations.

-Tony