From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D89AC4320A for ; Sat, 28 Aug 2021 15:49:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7763260EB0 for ; Sat, 28 Aug 2021 15:49:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231680AbhH1PuV (ORCPT ); Sat, 28 Aug 2021 11:50:21 -0400 Received: from relay06.th.seeweb.it ([5.144.164.167]:44275 "EHLO relay06.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229813AbhH1PuT (ORCPT ); Sat, 28 Aug 2021 11:50:19 -0400 Received: from [192.168.1.101] (83.6.168.105.neoplus.adsl.tpnet.pl [83.6.168.105]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 6D1D23EF16; Sat, 28 Aug 2021 17:49:25 +0200 (CEST) Subject: Re: [PATCH v2 06/18] arm64: dts: qcom: sm6350: Add TLMM block node To: Maulik Shah , ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Rob Herring , Rob Herring , Mark Brown , Jonathan Cameron , Viresh Kumar , Sebastian Reichel , Sudeep Holla , Hector Martin , Vinod Koul , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org References: <20210828131814.29589-1-konrad.dybcio@somainline.org> <20210828131814.29589-6-konrad.dybcio@somainline.org> <3f1dbbf3-8d62-e855-0dcf-740da7adb7df@codeaurora.org> From: Konrad Dybcio Message-ID: <39680f6f-56ff-7f87-0d8a-9bd31dc5ffce@somainline.org> Date: Sat, 28 Aug 2021 17:49:24 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <3f1dbbf3-8d62-e855-0dcf-740da7adb7df@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 28.08.2021 17:47, Maulik Shah wrote: > Hi, > > On 8/28/2021 6:48 PM, Konrad Dybcio wrote: >> Add TLMM pinctrl node to enable referencing the SoC pins in other nodes. >> >> Reviewed-by: AngeloGioacchino Del Regno >> Signed-off-by: Konrad Dybcio >> --- >> Changes since v1: >> - Fix the gpio ranges from 156 to 157 >> >>   arch/arm64/boot/dts/qcom/sm6350.dtsi | 19 +++++++++++++++++++ >>   1 file changed, 19 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi >> index d57c669ae0d6..03f7601457b4 100644 >> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi >> @@ -406,6 +406,25 @@ pdc: interrupt-controller@b220000 { >>               interrupt-controller; >>           }; >>   +        tlmm: pinctrl@f100000 { >> +            compatible = "qcom,sm6350-tlmm"; >> +            reg = <0 0x0f100000 0 0x300000>; >> +            interrupts = , >> +                    , >> +                    , >> +                    , >> +                    , >> +                    , >> +                    , >> +                    , >> +                    ; > you will not require other interrupts (209 to 216) for dual edge to work since you have below set in pinctrl-sm6350.c > > .wakeirq_dual_edge_errata = true, > > Thanks, > Maulik Right, I updated the binding but not the dt... Thanks for spotting that. Konrad