From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA5E4C352BE for ; Fri, 17 Apr 2020 09:33:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 93D6320776 for ; Fri, 17 Apr 2020 09:33:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730259AbgDQJdD (ORCPT ); Fri, 17 Apr 2020 05:33:03 -0400 Received: from foss.arm.com ([217.140.110.172]:48818 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730131AbgDQJdD (ORCPT ); Fri, 17 Apr 2020 05:33:03 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A017F30E; Fri, 17 Apr 2020 02:33:02 -0700 (PDT) Received: from [10.37.12.128] (unknown [10.37.12.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 38E6E3F73D; Fri, 17 Apr 2020 02:33:00 -0700 (PDT) Subject: Re: [PATCH 7/8] arm64: cpufeature: Relax checks for AArch32 support at EL[0-2] To: will@kernel.org Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, mark.rutland@arm.com, maz@kernel.org, anshuman.khandual@arm.com, catalin.marinas@arm.com, saiprakash.ranjan@codeaurora.org, dianders@chromium.org, kernel-team@android.com References: <20200414213114.2378-1-will@kernel.org> <20200414213114.2378-8-will@kernel.org> <714f124c-7eb7-b750-e98c-63da64ddae75@arm.com> <20200415105843.GE12621@willie-the-truck> <20200415122926.GA17095@willie-the-truck> From: Suzuki K Poulose Message-ID: <399dee05-9f47-2f91-a4e8-b4c9d3932b40@arm.com> Date: Fri, 17 Apr 2020 10:37:50 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20200415122926.GA17095@willie-the-truck> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/15/2020 01:29 PM, Will Deacon wrote: > On Wed, Apr 15, 2020 at 12:37:31PM +0100, Suzuki K Poulose wrote: >> On 04/15/2020 11:58 AM, Will Deacon wrote: >>> On Wed, Apr 15, 2020 at 11:50:58AM +0100, Suzuki K Poulose wrote: >>>> On 04/14/2020 10:31 PM, Will Deacon wrote: >>>>> We don't need to be quite as strict about mismatched AArch32 support, >>>>> which is good because the friendly hardware folks have been busy >>>>> mismatching this to their hearts' content. >>>>> >>>>> * We don't care about EL2 or EL3 (there are silly comments concerning >>>>> the latter, so remove those) >>>>> >>>>> * EL1 support is gated by the ARM64_HAS_32BIT_EL1 capability and handled >>>>> gracefully when a mismatch occurs >>>>> >>>>> * EL1 support is gated by the ARM64_HAS_32BIT_EL0 capability and handled >>>> >>>> s/EL1/EL0 >>>> >>>>> gracefully when a mismatch occurs >>>>> >>>>> Relax the AArch32 checks to FTR_NONSTRICT. >>>> >>>> Agreed. We should do something similar for the features exposed by the >>>> ELF_HWCAP, of course in a separate series. >>> >>> Hmm, I didn't think we needed to touch the HWCAPs, as they're derived from >>> the sanitised feature register values. What am I missing? >> >> sorry, that was cryptic. I was suggesting to relax the ftr fields to >> NONSTRICT for the fields covered by ELF HWCAPs (and other CPU hwcaps). > > Ah, gotcha. Given that the HWCAPs usually describe EL0 features, I say we > can punt this down the road until people give us hardware with mismatched > AArch32 at EL0. Btw, this is not just mismatched AArch32, but mismatched AArch64 HWCAPs too, which I believe exists. Anyways as you said, we can delay this until we get the reports :-) Suzuki From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12398C3815B for ; Fri, 17 Apr 2020 09:33:07 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id C2B7D21D91 for ; Fri, 17 Apr 2020 09:33:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C2B7D21D91 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 0C0574B250; Fri, 17 Apr 2020 05:33:06 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id iUppacEnm2MT; Fri, 17 Apr 2020 05:33:04 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id E48544B257; Fri, 17 Apr 2020 05:33:04 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 3BB474B23C for ; Fri, 17 Apr 2020 05:33:04 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id D7V1vQI01Qr6 for ; Fri, 17 Apr 2020 05:33:03 -0400 (EDT) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 1F7A84B201 for ; Fri, 17 Apr 2020 05:33:03 -0400 (EDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A017F30E; Fri, 17 Apr 2020 02:33:02 -0700 (PDT) Received: from [10.37.12.128] (unknown [10.37.12.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 38E6E3F73D; Fri, 17 Apr 2020 02:33:00 -0700 (PDT) Subject: Re: [PATCH 7/8] arm64: cpufeature: Relax checks for AArch32 support at EL[0-2] To: will@kernel.org References: <20200414213114.2378-1-will@kernel.org> <20200414213114.2378-8-will@kernel.org> <714f124c-7eb7-b750-e98c-63da64ddae75@arm.com> <20200415105843.GE12621@willie-the-truck> <20200415122926.GA17095@willie-the-truck> From: Suzuki K Poulose Message-ID: <399dee05-9f47-2f91-a4e8-b4c9d3932b40@arm.com> Date: Fri, 17 Apr 2020 10:37:50 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20200415122926.GA17095@willie-the-truck> Content-Language: en-US Cc: saiprakash.ranjan@codeaurora.org, anshuman.khandual@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, catalin.marinas@arm.com, kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 04/15/2020 01:29 PM, Will Deacon wrote: > On Wed, Apr 15, 2020 at 12:37:31PM +0100, Suzuki K Poulose wrote: >> On 04/15/2020 11:58 AM, Will Deacon wrote: >>> On Wed, Apr 15, 2020 at 11:50:58AM +0100, Suzuki K Poulose wrote: >>>> On 04/14/2020 10:31 PM, Will Deacon wrote: >>>>> We don't need to be quite as strict about mismatched AArch32 support, >>>>> which is good because the friendly hardware folks have been busy >>>>> mismatching this to their hearts' content. >>>>> >>>>> * We don't care about EL2 or EL3 (there are silly comments concerning >>>>> the latter, so remove those) >>>>> >>>>> * EL1 support is gated by the ARM64_HAS_32BIT_EL1 capability and handled >>>>> gracefully when a mismatch occurs >>>>> >>>>> * EL1 support is gated by the ARM64_HAS_32BIT_EL0 capability and handled >>>> >>>> s/EL1/EL0 >>>> >>>>> gracefully when a mismatch occurs >>>>> >>>>> Relax the AArch32 checks to FTR_NONSTRICT. >>>> >>>> Agreed. We should do something similar for the features exposed by the >>>> ELF_HWCAP, of course in a separate series. >>> >>> Hmm, I didn't think we needed to touch the HWCAPs, as they're derived from >>> the sanitised feature register values. What am I missing? >> >> sorry, that was cryptic. I was suggesting to relax the ftr fields to >> NONSTRICT for the fields covered by ELF HWCAPs (and other CPU hwcaps). > > Ah, gotcha. Given that the HWCAPs usually describe EL0 features, I say we > can punt this down the road until people give us hardware with mismatched > AArch32 at EL0. Btw, this is not just mismatched AArch32, but mismatched AArch64 HWCAPs too, which I believe exists. Anyways as you said, we can delay this until we get the reports :-) Suzuki _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 801B5C352BE for ; Fri, 17 Apr 2020 09:33:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2BD1A20776 for ; Fri, 17 Apr 2020 09:33:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="UCl75185" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2BD1A20776 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=c0jPZUUzQWBqvGuHTeDodkfKwFABupZ0lOGWcDaZN6c=; b=UCl75185SfhBzZWCJZJEmvaPw olVzeyoqnxHUvQLdnJNdLFPBqRJ9IGR/1cJNBNtJIPJlwRe3kbXKjCIc6FZdprOj2DCxoXqQmElxP fz0dDHAmG0YUJhv5Ke/7jF6HIRqdUQhIG2TqVu+ne8RrMR4lg27cxrpn1mzWEA3xi0crUKtgh5G0G eWgzvi/6az/KEmkYs0n3XAxA6cQBSb9Vx3Dd+jzxVAKQoIPHc3LPNJ4sylIV5LZCbwo96QX4aZ5z5 iDxzgbVLql1iTulfwA5xgt6yEhN+qTx1RIiSzD2TYl9XnqHe01T2vDlJKqHwusrvQoaIhYmchR+DU 1Q2hTmZfA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jPNMx-0001Qh-BM; Fri, 17 Apr 2020 09:33:07 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jPNMu-0001Oh-5G for linux-arm-kernel@lists.infradead.org; Fri, 17 Apr 2020 09:33:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A017F30E; Fri, 17 Apr 2020 02:33:02 -0700 (PDT) Received: from [10.37.12.128] (unknown [10.37.12.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 38E6E3F73D; Fri, 17 Apr 2020 02:33:00 -0700 (PDT) Subject: Re: [PATCH 7/8] arm64: cpufeature: Relax checks for AArch32 support at EL[0-2] To: will@kernel.org References: <20200414213114.2378-1-will@kernel.org> <20200414213114.2378-8-will@kernel.org> <714f124c-7eb7-b750-e98c-63da64ddae75@arm.com> <20200415105843.GE12621@willie-the-truck> <20200415122926.GA17095@willie-the-truck> From: Suzuki K Poulose Message-ID: <399dee05-9f47-2f91-a4e8-b4c9d3932b40@arm.com> Date: Fri, 17 Apr 2020 10:37:50 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20200415122926.GA17095@willie-the-truck> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200417_023304_245677_7A5CA058 X-CRM114-Status: GOOD ( 15.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, saiprakash.ranjan@codeaurora.org, anshuman.khandual@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, catalin.marinas@arm.com, kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 04/15/2020 01:29 PM, Will Deacon wrote: > On Wed, Apr 15, 2020 at 12:37:31PM +0100, Suzuki K Poulose wrote: >> On 04/15/2020 11:58 AM, Will Deacon wrote: >>> On Wed, Apr 15, 2020 at 11:50:58AM +0100, Suzuki K Poulose wrote: >>>> On 04/14/2020 10:31 PM, Will Deacon wrote: >>>>> We don't need to be quite as strict about mismatched AArch32 support, >>>>> which is good because the friendly hardware folks have been busy >>>>> mismatching this to their hearts' content. >>>>> >>>>> * We don't care about EL2 or EL3 (there are silly comments concerning >>>>> the latter, so remove those) >>>>> >>>>> * EL1 support is gated by the ARM64_HAS_32BIT_EL1 capability and handled >>>>> gracefully when a mismatch occurs >>>>> >>>>> * EL1 support is gated by the ARM64_HAS_32BIT_EL0 capability and handled >>>> >>>> s/EL1/EL0 >>>> >>>>> gracefully when a mismatch occurs >>>>> >>>>> Relax the AArch32 checks to FTR_NONSTRICT. >>>> >>>> Agreed. We should do something similar for the features exposed by the >>>> ELF_HWCAP, of course in a separate series. >>> >>> Hmm, I didn't think we needed to touch the HWCAPs, as they're derived from >>> the sanitised feature register values. What am I missing? >> >> sorry, that was cryptic. I was suggesting to relax the ftr fields to >> NONSTRICT for the fields covered by ELF HWCAPs (and other CPU hwcaps). > > Ah, gotcha. Given that the HWCAPs usually describe EL0 features, I say we > can punt this down the road until people give us hardware with mismatched > AArch32 at EL0. Btw, this is not just mismatched AArch32, but mismatched AArch64 HWCAPs too, which I believe exists. Anyways as you said, we can delay this until we get the reports :-) Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel