* [PATCH] mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI
@ 2021-10-18 11:33 ` Usama Arif
2021-10-18 23:38 ` Jaehoon Chung
0 siblings, 1 reply; 2+ messages in thread
From: Usama Arif @ 2021-10-18 11:33 UTC (permalink / raw)
To: u-boot; +Cc: nd, Anders.Dellien, Usama Arif
There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
needs to be enabled for multi block writes (MMC CMD 18).
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Icc79e352db6305c232527c4a432f17b7a30fec8e
---
drivers/mmc/arm_pl180_mmci.c | 14 ++++++++++++++
drivers/mmc/arm_pl180_mmci.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index f99b5f997e..9c5d48e90c 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -282,6 +282,14 @@ static int host_request(struct mmc *dev,
return result;
}
+static int check_peripheral_id(struct pl180_mmc_host *host, u32 periph_id)
+{
+ return readl(&host->base->periph_id0) == (periph_id & 0xFF) &&
+ readl(&host->base->periph_id1) == ((periph_id >> 8) & 0xFF) &&
+ readl(&host->base->periph_id2) == ((periph_id >> 16) & 0xFF) &&
+ readl(&host->base->periph_id3) == ((periph_id >> 24) & 0xFF);
+}
+
static int host_set_ios(struct mmc *dev)
{
struct pl180_mmc_host *host = dev->priv;
@@ -337,6 +345,12 @@ static int host_set_ios(struct mmc *dev)
sdi_clkcr &= ~(SDI_CLKCR_WIDBUS_MASK);
sdi_clkcr |= buswidth;
}
+ /* For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
+ * needs to be enabled for multi block writes (MMC CMD 18).
+ */
+ if (check_peripheral_id(host, 0x02041180) ||
+ check_peripheral_id(host, 0x03041180))
+ sdi_clkcr |= SDI_CLKCR_HWFCEN;
writel(sdi_clkcr, &host->base->clock);
udelay(CLK_CHANGE_DELAY);
diff --git a/drivers/mmc/arm_pl180_mmci.h b/drivers/mmc/arm_pl180_mmci.h
index 15c29beadb..fca15910a8 100644
--- a/drivers/mmc/arm_pl180_mmci.h
+++ b/drivers/mmc/arm_pl180_mmci.h
@@ -43,6 +43,7 @@
#define SDI_CLKCR_CLKEN 0x00000100
#define SDI_CLKCR_PWRSAV 0x00000200
#define SDI_CLKCR_BYPASS 0x00000400
+#define SDI_CLKCR_HWFCEN 0x00001000
#define SDI_CLKCR_WIDBUS_MASK 0x00001800
#define SDI_CLKCR_WIDBUS_1 0x00000000
#define SDI_CLKCR_WIDBUS_4 0x00000800
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI
2021-10-18 11:33 ` [PATCH] mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI Usama Arif
@ 2021-10-18 23:38 ` Jaehoon Chung
0 siblings, 0 replies; 2+ messages in thread
From: Jaehoon Chung @ 2021-10-18 23:38 UTC (permalink / raw)
To: Usama Arif, u-boot; +Cc: nd, Anders.Dellien, Peng Fan
Hi,
+Cc Peng,
On 10/18/21 8:33 PM, Usama Arif wrote:
> There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
> For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
> needs to be enabled for multi block writes (MMC CMD 18).
>
> Signed-off-by: Usama Arif <usama.arif@arm.com>
> Change-Id: Icc79e352db6305c232527c4a432f17b7a30fec8e
Remove Change-ID.
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/arm_pl180_mmci.c | 14 ++++++++++++++
> drivers/mmc/arm_pl180_mmci.h | 1 +
> 2 files changed, 15 insertions(+)
>
> diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
> index f99b5f997e..9c5d48e90c 100644
> --- a/drivers/mmc/arm_pl180_mmci.c
> +++ b/drivers/mmc/arm_pl180_mmci.c
> @@ -282,6 +282,14 @@ static int host_request(struct mmc *dev,
> return result;
> }
>
> +static int check_peripheral_id(struct pl180_mmc_host *host, u32 periph_id)
> +{
> + return readl(&host->base->periph_id0) == (periph_id & 0xFF) &&
> + readl(&host->base->periph_id1) == ((periph_id >> 8) & 0xFF) &&
> + readl(&host->base->periph_id2) == ((periph_id >> 16) & 0xFF) &&
> + readl(&host->base->periph_id3) == ((periph_id >> 24) & 0xFF);
> +}
> +
> static int host_set_ios(struct mmc *dev)
> {
> struct pl180_mmc_host *host = dev->priv;
> @@ -337,6 +345,12 @@ static int host_set_ios(struct mmc *dev)
> sdi_clkcr &= ~(SDI_CLKCR_WIDBUS_MASK);
> sdi_clkcr |= buswidth;
> }
> + /* For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
> + * needs to be enabled for multi block writes (MMC CMD 18).
> + */
> + if (check_peripheral_id(host, 0x02041180) ||
> + check_peripheral_id(host, 0x03041180))
> + sdi_clkcr |= SDI_CLKCR_HWFCEN;
>
> writel(sdi_clkcr, &host->base->clock);
> udelay(CLK_CHANGE_DELAY);
> diff --git a/drivers/mmc/arm_pl180_mmci.h b/drivers/mmc/arm_pl180_mmci.h
> index 15c29beadb..fca15910a8 100644
> --- a/drivers/mmc/arm_pl180_mmci.h
> +++ b/drivers/mmc/arm_pl180_mmci.h
> @@ -43,6 +43,7 @@
> #define SDI_CLKCR_CLKEN 0x00000100
> #define SDI_CLKCR_PWRSAV 0x00000200
> #define SDI_CLKCR_BYPASS 0x00000400
> +#define SDI_CLKCR_HWFCEN 0x00001000
> #define SDI_CLKCR_WIDBUS_MASK 0x00001800
> #define SDI_CLKCR_WIDBUS_1 0x00000000
> #define SDI_CLKCR_WIDBUS_4 0x00000800
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2021-10-18 11:33 ` [PATCH] mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI Usama Arif
2021-10-18 23:38 ` Jaehoon Chung
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