From mboxrd@z Thu Jan  1 00:00:00 1970
From: Vignesh Raghavendra <vigneshr@ti.com>
Date: Wed, 25 Sep 2019 16:54:55 +0530
Subject: [U-Boot] [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable
 SPI_NOR_4B_OPCODES for n25q512* and n25q256*
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 <20190910170621.2064-2-vigneshr@ti.com>
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 <710074c4-e1f9-972c-3dab-a6a6d6437d45@microchip.com>
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Hi,

On 25/09/19 4:37 PM, Simon Goldschmidt wrote:
> On Tue, Sep 24, 2019 at 2:08 PM Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com> wrote:
>>
[...]
>>>
>>> But, do you have access to n25q variants? And does that support 4 Byte
>>> addressing opcode? What does its JEDEC ID read?
>>
>> No, at the moment I don't. I'll see if I can get hold of one.
> 
> Ok, so I found a board with an n25q256a and tested that as well as the
> Altera/Intel EPCQ256N (on socfpga_socrateds) and both read the same ID and
> SFDP:
> 
> JEDEC id bytes: 20, ba, 19, 10, 00, 00
> bfpt.dwords[0] = fffb20e5
> bfpt.dwords[1] = 0fffffff
> bfpt.dwords[2] = 6b27eb29
> bfpt.dwords[3] = bb273b08
> bfpt.dwords[4] = ffffffff
> bfpt.dwords[5] = bb27ffff
> bfpt.dwords[6] = eb29ffff
> bfpt.dwords[7] = d810200c
> bfpt.dwords[8] = 00000000
> bfpt.dwords[9] = 00000000
> bfpt.dwords[10] = 00000000
> bfpt.dwords[11] = 00000000
> bfpt.dwords[12] = 00000000
> bfpt.dwords[13] = 00000000
> bfpt.dwords[14] = 00000000
> bfpt.dwords[15] = 00000000
> SF: Detected n25q256a with page size 256 Bytes, erase size 64 KiB, total 32 MiB
> 

Thanks for the logs!

> I don't know whether one of these supports 4 byte opcodes, but I guess it's
> safe to say the 5th byte 0x44 is an mt25 which supports 4 byte opcodes.
> 

There is a way to test if flash supports 4 byte addressing opcodes:

With plain U-Boot master (without any of my patches) that has SPI_NOR_4B_OPCODES
set for n25q256a try following:

	sf erase 0x0 0x10000 /* erase one sector at 0x0 */
	sf erase 0x1000000 0x1000 /* erase one sector at 16M */
	sf write <address of random data>  0x1000000 0x100 /* write a page of data at 16M */
	sf read addr1  0x1000000 0x100 /* read back */
	md.b addr1

In case flash does not understand 4 byte addressing opcode, its possible
that data written to flash may wrap and be written to 0x0-0x10000. 
So readback and see if 0x0 is still all 0xffs:

	sf read addr1  0x0 0x100
	md.b addr1

So if first md.b shows valid data and second md.b shows all 0xffs then flash supports 4 byte addressing opcode

Regards
Vignesh

> Do you plan to port this series to Linux, too?
> 
> Regards,
> Simon
> 
>>
>> Regards,
>> Simon
>>
>>>
>>>> I also wasn't really aware of the differences between those two, sorry.
>>>>
>>>> Regards,
>>>> Simon
>>>>
>>>>>
>>>>> Cheers,
>>>>> ta
>>>>>

-- 
Regards
Vignesh