On Sat, 2023-01-07 at 21:31 +0100, Sam Ravnborg wrote:
> On Fri, Jan 06, 2023 at 11:05:21AM +0800, xinlei.lee@mediatek.com
> wrote:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> > 
> > Since the panel spec stipulates that the time from lcm_reset to DSI
> > to
> > send the initial code should be greater than 6ms and less than
> > 40ms,
> > so reduce the delay before sending the initial code and avoid panel
> > exceptions.
> 
> The changelog says "reduce the delay", but the patch removes the
> delay.
> Are there other delays that make sure the "greater than 6 ms" is OK?
> 
> 	Sam
> 
> > 
> > Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga
> > dsi video mode panel")
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > ---
> >  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 1 -
> >  1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > index 857a2f0420d7..f0093035f1ff 100644
> > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > @@ -780,7 +780,6 @@ static const struct panel_init_cmd
> > inx_hj110iz_init_cmd[] = {
> >  };
> >  
> >  static const struct panel_init_cmd boe_init_cmd[] = {
> > -	_INIT_DELAY_CMD(24),
> >  	_INIT_DCS_CMD(0xB0, 0x05),
> >  	_INIT_DCS_CMD(0xB1, 0xE5),
> >  	_INIT_DCS_CMD(0xB3, 0x52),
> > -- 
> > 2.18.0

Hi Sam:

Thanks for your reply!

Please allow me to explain, in the boe_panel_prepare function in this 
file, there will be a 6ms delay after the reset pin is pulled high 
(gpiod_set_value(boe->enable_gpio, 1)), and the initial code will be 
sent in the boe_panel_init_dcs_cmd function later, This period of time 
ensures that the delay is within the specified range.

In addition, I will add a special panel control in the V2 version, if 
you have any questions, we will discuss it later.

Best Regards!
xinlei