All of lore.kernel.org
 help / color / mirror / Atom feed
From: Felix Kuehling <felix.kuehling-5C7GfCeVMHo@public.gmane.org>
To: Oded Gabbay <oded.gabbay-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jerome Glisse <j.glisse-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Ben Goz <ben.goz-5C7GfCeVMHo@public.gmane.org>,
	Moses Reuben <moses.reuben-5C7GfCeVMHo@public.gmane.org>,
	amd-gfx list
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH 22/24] drm/amdkfd: Adding new IOCTL for scratch memory v2
Date: Mon, 21 Aug 2017 16:06:52 -0400	[thread overview]
Message-ID: <3aaf8348-46b2-bff4-16fb-65f3fbc2fb48@amd.com> (raw)
In-Reply-To: <CAFCwf10hhjmmoTv+3GP85FeyWYv4AyL1G+xBYmZfr_39N=wiOA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On 2017-08-21 03:21 PM, Oded Gabbay wrote:
> On Mon, Aug 21, 2017 at 8:39 PM, Jerome Glisse <j.glisse@gmail.com> wrote:
>> On Tue, Aug 15, 2017 at 11:00:20PM -0400, Felix Kuehling wrote:
>>> From: Moses Reuben <moses.reuben@amd.com>
>>>
>>> v2:
>>> * Renamed ALLOC_MEMORY_OF_SCRATCH to SET_SCRATCH_BACKING_VA
>>> * Removed size parameter from the ioctl, it was unused
>>> * Removed hole in ioctl number space
>>> * No more call to write_config_static_mem
>>> * Return correct error code from ioctl
>> What kind of memory is suppose to back this virtual address
>> range ? How big is the range suppose to be ? Can it be any
>> valid virtual address ?
>>
>> My worry here is to ascertain that one can not abuse this
>> ioctl say to set the virtual address to some mmaped shared
>> library code/data section and write something malicious
>> there.
>>
>> I am assuming that if it has to go through ATS/PASID of the
>> IOMMUv2 then the write protection will be asserted and we
>> will see proper COW (copy on write) due to mmap PRIVATE flags.
>>
>>
>> Idealy this area should be a special vma and the driver
>> should track its lifetime and cancel GPU jobs if it is
>> unmap. But i am unsure on how dynamic is that scratch
>> memory suppose to be (ie do you allocate new scratch memory
>> with every GPU job or is it allocated once and reuse for
>> every jobs).
>>
>> Bigger commit message would be nice too. Like i had tons
>> of i believe valid questions.
>>
>> Cheers,
>> Jérôme
> Hi Jerome,
> Great points.
>
> This is the explanation Felix gave a few days ago on this ioctl in a
> different email thread:
>
> "Scratch memory is private memory per work-item. It's used when a shader
> program has too few registers available. With HSA we use flat scratch
> addressing, where shaders can access private memory in a special scratch
> aperture using normal memory instructions. Using the same virtual
> address, each work item gets its own private piece of memory. The
> hardware does the address translation from the VA in the private
> aperture to a scratch-backing VA. The application is responsible for
> allocating the memory to back that scratch area, and to map it somewhere
> in its virtual address space.
>
> This ioctl tells the hardware (or HWS firmware) the VA of the scratch
> backing memory."
>
> From this explanation, I think that the user's supplied VA should be
> tested that its a valid writable area of the user.
> How do you test for that ? could you point me to such a code in the kernel ?
> From looking at other drivers that pin host memory, like mellanox nic,
> they don't do any special testing for the address they receive from
> the user.
>
> Felix,
> Is the scratch memory size fixed ? Because I don't see a size argument
> in the IOCTL.

The hardware needs a continuous pieces of virtual address space for
scratch backing. The base address of that continuous region is
programmed into a per-VMID register (SH_HIDDEN_PRIVATE_BASE_VMID) by the
driver or the HWS (hardware scheduler) firmware. So the size is limited
by the amount of address space reserved for this purpose by user mode.
But the HW doesn't really care what that size is. The HSA runtime
manages the sub-allocation or scratch memory per queue. It knows the
size that it allocates and will need to make sure it sub-allocates
within that size.

In the queue setup data structures it must somewhere contain information
about the offset from the start of scratch memory, and some address
swizzling parameters to determine per work item or per wavefront
addresses. I'm not familiar with the details of those data structures,
and the size limits in the hardware. They would determine an upper limit
for the size of scratch backing.

BTW, on Vega10 the way scratch works has been changed, and this ioctl
becomes basically a no-op. The SH_HIDDEN_PRIVATE_BASE_VMID register no
longer exists. Instead the base address is now provided to the shader
directly without being programmed ahead of time by KFD or HWS. Setting
up scratch memory per queue is entirely up to the Runtime now.

Regards,
  Felix

> If it is fixed, what is the size ?
>
> Thanks,
> Oded

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2017-08-21 20:06 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-16  2:59 [PATCH 00/24] KFD fixes, cleanups, features to make the runtime happy Felix Kuehling
     [not found] ` <1502852422-19620-1-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-16  2:59   ` [PATCH 01/24] drm/amdkfd: Fix typo in dbgdev_wave_reset_wavefronts Felix Kuehling
2017-08-16  3:00   ` [PATCH 02/24] drm/radeon: Return dword offsets of address watch registers Felix Kuehling
     [not found]     ` <1502852422-19620-3-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-16  9:44       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 03/24] drm/amdkfd: Remove bogus divide-by-sizeof(uint32_t) Felix Kuehling
     [not found]     ` <1502852422-19620-4-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-16  9:44       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 04/24] drm/amdkfd: Fix allocated_queues bitmap initialization Felix Kuehling
2017-08-16  3:00   ` [PATCH 05/24] drm/amdgpu: Remove hard-coded assumptions about compute pipes Felix Kuehling
2017-08-16  3:00   ` [PATCH 06/24] drm/amdkfd: Clean up KFD style errors and warnings v2 Felix Kuehling
     [not found]     ` <1502852422-19620-7-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-18 17:35       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 07/24] drm/amdkfd: Consolidate and clean up log commands Felix Kuehling
2017-08-16  3:00   ` [PATCH 08/24] drm/amdkfd: Change x==NULL/false references to !x Felix Kuehling
2017-08-16  3:00   ` [PATCH 09/24] drm/amdkfd: Fix goto usage v2 Felix Kuehling
2017-08-16  3:00   ` [PATCH 10/24] drm/amdkfd: Remove usage of alloc(sizeof(struct Felix Kuehling
2017-08-16  3:00   ` [PATCH 11/24] drm/amdkfd: Remove BUG_ONs for NULL pointer arguments Felix Kuehling
2017-08-16  3:00   ` [PATCH 12/24] drm/amdkfd: Fix doorbell initialization and finalization Felix Kuehling
2017-08-16  3:00   ` [PATCH 13/24] drm/amdkfd: Allocate gtt_sa_bitmap in long units Felix Kuehling
2017-08-16  3:00   ` [PATCH 14/24] drm/amdkfd: Handle remaining BUG_ONs more gracefully v2 Felix Kuehling
     [not found]     ` <1502852422-19620-15-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-16  9:45       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 15/24] drm/amdkfd: Add more error printing to help bringup v2 Felix Kuehling
     [not found]     ` <1502852422-19620-16-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-16  9:45       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 16/24] drm/amdkfd: Clamp EOP queue size correctly on Gfx8 Felix Kuehling
2017-08-16  3:00   ` [PATCH 17/24] drm/amdkfd: Update PM4 packet headers Felix Kuehling
2017-08-16  3:00   ` [PATCH 18/24] drm/amdgpu: Disable GFX PG on CZ Felix Kuehling
2017-08-16  3:00   ` [PATCH 19/24] drm/amd: Update MEC HQD loading code for KFD Felix Kuehling
2017-08-16  3:00   ` [PATCH 20/24] drm/amdgpu: Program SH_STATIC_MEM_CONFIG globally, not per-VMID Felix Kuehling
     [not found]     ` <1502852422-19620-21-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-16  9:43       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 21/24] drm/amdgpu: Add kgd/kfd interface to support scratch memory v2 Felix Kuehling
     [not found]     ` <1502852422-19620-22-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-18 15:32       ` Oded Gabbay
2017-08-16  3:00   ` [PATCH 22/24] drm/amdkfd: Adding new IOCTL for " Felix Kuehling
     [not found]     ` <1502852422-19620-23-git-send-email-Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>
2017-08-18 15:34       ` Oded Gabbay
2017-08-21 17:39       ` Jerome Glisse
     [not found]         ` <20170821173918.GA4125-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-08-21 19:21           ` Oded Gabbay
     [not found]             ` <CAFCwf10hhjmmoTv+3GP85FeyWYv4AyL1G+xBYmZfr_39N=wiOA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-08-21 20:01               ` Jerome Glisse
     [not found]                 ` <20170821200104.GB4125-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-08-21 20:11                   ` Felix Kuehling
     [not found]                     ` <9b600e94-f3d7-d1de-90da-6e578ce8c108-5C7GfCeVMHo@public.gmane.org>
2017-08-22  6:21                       ` Oded Gabbay
2017-08-21 20:06               ` Felix Kuehling [this message]
     [not found]                 ` <3aaf8348-46b2-bff4-16fb-65f3fbc2fb48-5C7GfCeVMHo@public.gmane.org>
2017-08-22  8:52                   ` Christian König
     [not found]                     ` <f87ac8e2-8cf0-0729-87ed-de172af3499f-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-08-22 18:45                       ` Felix Kuehling
2017-08-21 19:32           ` Felix Kuehling
2017-08-16  3:00   ` [PATCH 23/24] drm/amdgpu: Add kgd kfd interface get_tile_config() v2 Felix Kuehling
2017-08-16  3:00   ` [PATCH 24/24] drm/amdkfd: Implement image tiling mode support v2 Felix Kuehling
2017-08-16  7:51   ` [PATCH 00/24] KFD fixes, cleanups, features to make the runtime happy Christian König
     [not found]     ` <5c7f2140-0467-ebdb-87ca-0cd9d642ddbf-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-08-16  9:33       ` Oded Gabbay
2017-09-09  1:17   ` Felix Kuehling

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3aaf8348-46b2-bff4-16fb-65f3fbc2fb48@amd.com \
    --to=felix.kuehling-5c7gfcevmho@public.gmane.org \
    --cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
    --cc=ben.goz-5C7GfCeVMHo@public.gmane.org \
    --cc=j.glisse-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=moses.reuben-5C7GfCeVMHo@public.gmane.org \
    --cc=oded.gabbay-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.