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From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= <clg@kaod.org>
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Date: Thu, 3 May 2018 10:05:11 +0200
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Subject: Re: [Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support
 for PowerNV POWER9 machines
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To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Suraj Jitindar Singh <sjitindarsingh@gmail.com>

On 05/03/2018 08:36 AM, David Gibson wrote:
> On Thu, May 03, 2018 at 07:52:32AM +0200, C=E9dric Le Goater wrote:
>> On 05/03/2018 02:58 AM, David Gibson wrote:
>>> On Tue, Apr 24, 2018 at 02:41:47PM +0200, C=E9dric Le Goater wrote:
>>>> On 04/24/2018 02:03 PM, C=E9dric Le Goater wrote:
>>>>>> +hwaddr ppc_hash64_hpt_reg(PowerPCCPU *cpu)
>>>>>> +{
>>>>>> +    CPUPPCState *env =3D &cpu->env;
>>>>>> +
>>>>>> +    /* We should not reach this routine on sPAPR machines */
>>>>>> +    assert(!cpu->vhyp);
>>>>>> +
>>>>>> +    /* PowerNV machine */
>>>>>> +    if (msr_hv) {
>>>>>> +        if (env->mmu_model & POWERPC_MMU_3_00) {
>>>>>> +            return ppc64_v3_get_patbe0(cpu);
>>>>>> +        } else {
>>>>>> +            return cpu->env.spr[SPR_SDR1];
>>>>>> +        }
>>>>>> +    } else {
>>>>>> +        error_report("PowerNV guest support Unimplemented");
>>>>>> +        exit(1);
>>>>>
>>>>> I just noticed that this breaks 970 CPUs ...
>>>>
>>>> How about ?
>>>
>>> Hmm.. I'm not actually seeing why it breaks 970.
>>
>> it does not have MSR_SHV bit.
>=20
> It does, actually.  At least, as long as it's not strapped into "Apple
> mode".

ah. this is why the tests are failing then :=20

tests/boot-serial-test.c:    { "ppc64", "mac99", "", "PowerPC,970FX" },

C.

>=20
>>> I really want to ditch 970 support, but we have to go through the
>>> deprecation process first.
>>
>> Is it causing a lot of maintenance issues ?
>=20
> Enough.  The explicit RMA allocation stuff is a particular pain.
>=20