From: "Thomas Hellström (Intel)" <thomas_os@shipmail.org> To: Matthew Auld <matthew.william.auld@gmail.com>, Christoph Hellwig <hch@lst.de> Cc: Serge Belyshev <belyshev@depni.sinp.msu.ru>, Peter Zijlstra <peterz@infradead.org>, Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, ML dri-devel <dri-devel@lists.freedesktop.org>, Chris Wilson <chris@chris-wilson.co.uk>, linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org> Subject: Re: [Intel-gfx] [PATCH 4/4] i915: fix remap_io_sg to verify the pgprot Date: Wed, 19 May 2021 07:46:55 +0200 [thread overview] Message-ID: <3d984dd9-9396-d992-5b88-94bcfde0a98d@shipmail.org> (raw) In-Reply-To: <CAM0jSHNR04h-t4_mE4KOGbu7fR8En4uNnhQSkB+bE8Q5vqcSjg@mail.gmail.com> On 5/18/21 5:00 PM, Matthew Auld wrote: > On Tue, 18 May 2021 at 14:21, Christoph Hellwig <hch@lst.de> wrote: >> On Mon, May 17, 2021 at 06:06:44PM +0100, Matthew Auld wrote: >>>> Looks like it is caused by the validation failure then. Which means the >>>> existing code is doing something wrong in its choice of the page >>>> protection bit. I really need help from the i915 maintainers here.. >>> AFAIK there are two users of remap_io_sg, the first is our shmem >>> objects(see i915_gem_shmem.c), and for these we support UC, WC, and WB >>> mmap modes for userspace. The other user is device local-memory >>> objects(VRAM), and for this one we have an actual io_mapping which is >>> allocated as WC, and IIRC this should only be mapped as WC for the >>> mmap mode, but normal userspace can't hit this path yet. >> The only caller in current mainline is vm_fault_cpu in i915_gem_mman.c. >> Is that device local? > The vm_fault_cpu covers both device local and shmem objects. > >>> What do we need to do here? It sounds like shmem backed objects are >>> allocated as WB for the pages underneath, but i915 allows mapping them >>> as UC/WC which trips up this track_pfn thing? >> To me the warnings looks like system memory is mapped with the wrong >> permissions, yes. If you want to map it as UC/WC the right set_memory_* >> needs to be used on the kernel mapping as well to ensure that the >> attributes don't conflict. > AFAIK mmap_offset also supports multiple active mmap modes for a given > object, so set_memory_* should still work here? No, that won't work because there are active maps with conflicting caching attributes. I think the history here is that that was assumed to be OK for integrated graphics that ran only on Intel processors that promise to never write back unmodified cache lines resulting from prefetching, like some AMD processors did way back at least. These conflicting mappings can obviously not be supported for discrete graphics, but for integrated they are part of the uAPI. /Thomas > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: "Thomas Hellström (Intel)" <thomas_os@shipmail.org> To: Matthew Auld <matthew.william.auld@gmail.com>, Christoph Hellwig <hch@lst.de> Cc: Serge Belyshev <belyshev@depni.sinp.msu.ru>, Peter Zijlstra <peterz@infradead.org>, Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, ML dri-devel <dri-devel@lists.freedesktop.org>, Chris Wilson <chris@chris-wilson.co.uk>, linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org> Subject: Re: [Intel-gfx] [PATCH 4/4] i915: fix remap_io_sg to verify the pgprot Date: Wed, 19 May 2021 07:46:55 +0200 [thread overview] Message-ID: <3d984dd9-9396-d992-5b88-94bcfde0a98d@shipmail.org> (raw) In-Reply-To: <CAM0jSHNR04h-t4_mE4KOGbu7fR8En4uNnhQSkB+bE8Q5vqcSjg@mail.gmail.com> On 5/18/21 5:00 PM, Matthew Auld wrote: > On Tue, 18 May 2021 at 14:21, Christoph Hellwig <hch@lst.de> wrote: >> On Mon, May 17, 2021 at 06:06:44PM +0100, Matthew Auld wrote: >>>> Looks like it is caused by the validation failure then. Which means the >>>> existing code is doing something wrong in its choice of the page >>>> protection bit. I really need help from the i915 maintainers here.. >>> AFAIK there are two users of remap_io_sg, the first is our shmem >>> objects(see i915_gem_shmem.c), and for these we support UC, WC, and WB >>> mmap modes for userspace. The other user is device local-memory >>> objects(VRAM), and for this one we have an actual io_mapping which is >>> allocated as WC, and IIRC this should only be mapped as WC for the >>> mmap mode, but normal userspace can't hit this path yet. >> The only caller in current mainline is vm_fault_cpu in i915_gem_mman.c. >> Is that device local? > The vm_fault_cpu covers both device local and shmem objects. > >>> What do we need to do here? It sounds like shmem backed objects are >>> allocated as WB for the pages underneath, but i915 allows mapping them >>> as UC/WC which trips up this track_pfn thing? >> To me the warnings looks like system memory is mapped with the wrong >> permissions, yes. If you want to map it as UC/WC the right set_memory_* >> needs to be used on the kernel mapping as well to ensure that the >> attributes don't conflict. > AFAIK mmap_offset also supports multiple active mmap modes for a given > object, so set_memory_* should still work here? No, that won't work because there are active maps with conflicting caching attributes. I think the history here is that that was assumed to be OK for integrated graphics that ran only on Intel processors that promise to never write back unmodified cache lines resulting from prefetching, like some AMD processors did way back at least. These conflicting mappings can obviously not be supported for discrete graphics, but for integrated they are part of the uAPI. /Thomas > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-19 5:47 UTC|newest] Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-26 5:55 add remap_pfn_range_notrack instead of reinventing it in i915 v2 Christoph Hellwig 2021-03-26 5:55 ` [Intel-gfx] " Christoph Hellwig 2021-03-26 5:55 ` [PATCH 1/4] mm: add remap_pfn_range_notrack Christoph Hellwig 2021-03-26 5:55 ` [Intel-gfx] " Christoph Hellwig 2021-03-26 5:55 ` [PATCH 2/4] mm: add a io_mapping_map_user helper Christoph Hellwig 2021-03-26 5:55 ` [Intel-gfx] " Christoph Hellwig 2021-10-20 15:40 ` Lucas De Marchi 2021-10-20 19:37 ` Peter Zijlstra 2021-10-21 6:18 ` Christoph Hellwig 2021-03-26 5:55 ` [PATCH 3/4] i915: use io_mapping_map_user Christoph Hellwig 2021-03-26 5:55 ` [Intel-gfx] " Christoph Hellwig 2021-03-26 5:55 ` [PATCH 4/4] i915: fix remap_io_sg to verify the pgprot Christoph Hellwig 2021-03-26 5:55 ` [Intel-gfx] " Christoph Hellwig 2021-05-08 19:33 ` youling257 2021-05-08 19:33 ` youling257 2021-05-08 19:33 ` youling257 2021-05-10 8:58 ` Christoph Hellwig 2021-05-10 8:58 ` Christoph Hellwig 2021-05-16 16:06 ` Serge Belyshev 2021-05-16 16:06 ` [Intel-gfx] " Serge Belyshev 2021-05-16 16:06 ` Serge Belyshev 2021-05-17 12:37 ` Christoph Hellwig 2021-05-17 12:37 ` [Intel-gfx] " Christoph Hellwig 2021-05-17 13:09 ` Serge Belyshev 2021-05-17 13:09 ` [Intel-gfx] " Serge Belyshev 2021-05-17 13:09 ` Serge Belyshev 2021-05-17 13:11 ` Christoph Hellwig 2021-05-17 13:11 ` [Intel-gfx] " Christoph Hellwig 2021-05-17 17:06 ` Matthew Auld 2021-05-17 17:06 ` Matthew Auld 2021-05-17 17:06 ` Matthew Auld 2021-05-18 13:21 ` Christoph Hellwig 2021-05-18 13:21 ` Christoph Hellwig 2021-05-18 15:00 ` Matthew Auld 2021-05-18 15:00 ` Matthew Auld 2021-05-18 15:00 ` Matthew Auld 2021-05-19 5:46 ` Thomas Hellström (Intel) [this message] 2021-05-19 5:46 ` Thomas Hellström (Intel) 2021-05-17 21:46 ` Thomas Hellström 2021-05-17 21:46 ` Thomas Hellström 2021-05-17 21:46 ` Thomas Hellström 2021-05-18 6:46 ` Thomas Hellström 2021-05-18 6:46 ` Thomas Hellström 2021-05-18 6:46 ` Thomas Hellström 2021-05-18 13:24 ` Christoph Hellwig 2021-05-18 13:24 ` Christoph Hellwig 2021-05-18 13:33 ` Thomas Hellström 2021-05-18 13:33 ` Thomas Hellström 2021-05-18 13:33 ` Thomas Hellström 2021-05-18 13:23 ` Christoph Hellwig 2021-05-18 13:23 ` Christoph Hellwig 2021-05-19 5:51 ` Thomas Hellström 2021-05-19 5:51 ` Thomas Hellström 2021-05-19 5:51 ` Thomas Hellström 2021-03-26 7:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] mm: add remap_pfn_range_notrack Patchwork 2021-03-26 7:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-03-26 7:34 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2021-03-26 7:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-04-08 10:36 ` add remap_pfn_range_notrack instead of reinventing it in i915 v2 Daniel Vetter 2021-04-08 10:36 ` [Intel-gfx] " Daniel Vetter 2021-04-08 10:36 ` Daniel Vetter 2021-04-08 11:28 ` Christoph Hellwig 2021-04-08 11:28 ` [Intel-gfx] " Christoph Hellwig
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