From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1134FC4338F for ; Mon, 2 Aug 2021 06:33:51 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CEC8160EBB for ; Mon, 2 Aug 2021 06:33:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org CEC8160EBB Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id AC64381671; Mon, 2 Aug 2021 08:33:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1627886027; bh=5VMfzsQQsrd/n+o6OfyecFsTVhk71EV9Pq56tINzM3o=; h=Subject:To:Cc:References:From:Date:In-Reply-To:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=dnuzYcXSdQwbRv/6iAHVt2Q7vrWkdQAD/sfVg4Fk9w9TOvSOH7b43JOvgCheIAlj5 lV4xXOy2ovNClUTSu5voO1okFeLTGjoyP00teDPyIuj3A8TCsPo8THy3RHUtaf9AkX KMTMFy7Z5cVuTw2jftIhEsQ//pJV1ZXLVGM2sjzAh9KogrR1Vnicx8dGR1YPqIEZbT i9oDrw1c3d/c6a8n3A8O1v4Vl9fV/U64yu3MJ1WTgIMMcQGYpSluNxiej88tNBHmLj /+i/b35XZ6loZoovDZirP7AEGlFULHIbLLSp7F0WosVb9Fzp3GxEL35ah6/9eoI5X1 WyvqdnePjvIDg== Received: by phobos.denx.de (Postfix, from userid 109) id 1682F81671; Mon, 2 Aug 2021 08:33:45 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [IPv6:2001:67c:2050:1::465:107]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 33762804E7 for ; Mon, 2 Aug 2021 08:33:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp1.mailbox.org (smtp1.mailbox.org [IPv6:2001:67c:2050:105:465:1:1:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4GdSrP67CNzQk9j; Mon, 2 Aug 2021 08:33:41 +0200 (CEST) Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter02.heinlein-hosting.de (spamfilter02.heinlein-hosting.de [80.241.56.116]) (amavisd-new, port 10030) with ESMTP id kEr59_v_Dfrz; Mon, 2 Aug 2021 08:33:38 +0200 (CEST) Subject: Re: [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register To: =?UTF-8?Q?Pali_Roh=c3=a1r?= , Chris Packham , Baruch Siach , Dirk Eibach , u-boot@lists.denx.de Cc: =?UTF-8?Q?Marek_Beh=c3=ban?= , Dennis Gilmore , Mario Six , Jon Nettleton References: <20210731122256.6546-1-pali@kernel.org> <20210731122256.6546-2-pali@kernel.org> From: Stefan Roese Message-ID: <3e1afbea-62ae-ebdb-5065-c6160ae10f83@denx.de> Date: Mon, 2 Aug 2021 08:33:37 +0200 MIME-Version: 1.0 In-Reply-To: <20210731122256.6546-2-pali@kernel.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: de-DE Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: B66D21898 X-Rspamd-UID: 48fd85 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On 31.07.21 14:22, Pali Rohár wrote: > Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz. > Use this information instead of manual configuration in every board file. > > Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese Thanks, Stefan > --- > arch/arm/mach-mvebu/include/mach/soc.h | 13 ++++++++----- > include/configs/clearfog.h | 1 - > include/configs/controlcenterdc.h | 2 -- > include/configs/db-88f6820-amc.h | 2 -- > include/configs/db-88f6820-gp.h | 2 -- > include/configs/helios4.h | 1 - > include/configs/turris_omnia.h | 1 - > include/configs/x530.h | 2 -- > 8 files changed, 8 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h > index 3f3b15aa8ab6..cb323aa59a76 100644 > --- a/arch/arm/mach-mvebu/include/mach/soc.h > +++ b/arch/arm/mach-mvebu/include/mach/soc.h > @@ -33,11 +33,6 @@ > #define MV_88F68XX_A0_ID 0x4 > #define MV_88F68XX_B0_ID 0xa > > -/* TCLK Core Clock definition */ > -#ifndef CONFIG_SYS_TCLK > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > -#endif > - > /* SOC specific definations */ > #define INTREG_BASE 0xd0000000 > #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080) > @@ -170,6 +165,9 @@ > #define BOOT_FROM_SPI 0x32 > #define BOOT_FROM_MMC 0x30 > #define BOOT_FROM_MMC_ALT 0x31 > + > +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \ > + 200000000 : 250000000) > #elif defined(CONFIG_ARMADA_MSYS) > /* SAR values for MSYS */ > #define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200) > @@ -207,4 +205,9 @@ > #define BOOT_FROM_SPI 0x3 > #endif > > +/* TCLK Core Clock definition */ > +#ifndef CONFIG_SYS_TCLK > +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > +#endif > + > #endif /* _MVEBU_SOC_H */ > diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h > index fbdd2f0a244c..705217067b30 100644 > --- a/include/configs/clearfog.h > +++ b/include/configs/clearfog.h > @@ -17,7 +17,6 @@ > * for DDR ECC byte filling in the SPL before loading the main > * U-Boot into it. > */ > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > > /* USB/EHCI configuration */ > #define CONFIG_EHCI_IS_TDI > diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h > index e81d05aa2e83..d9802d2a3b8d 100644 > --- a/include/configs/controlcenterdc.h > +++ b/include/configs/controlcenterdc.h > @@ -20,8 +20,6 @@ > * U-Boot into it. > */ > > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > - > #define CONFIG_LOADADDR 1000000 > > /* > diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h > index 757fbc0b9bcd..83f5b71839e2 100644 > --- a/include/configs/db-88f6820-amc.h > +++ b/include/configs/db-88f6820-amc.h > @@ -10,8 +10,6 @@ > * High Level Configuration Options (easy to change) > */ > > -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ > - > /* USB/EHCI configuration */ > #define CONFIG_EHCI_IS_TDI > > diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h > index d50eb2c12011..feab46cbcbc5 100644 > --- a/include/configs/db-88f6820-gp.h > +++ b/include/configs/db-88f6820-gp.h > @@ -10,8 +10,6 @@ > * High Level Configuration Options (easy to change) > */ > > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > - > /* I2C */ > #define CONFIG_SYS_I2C > #define CONFIG_SYS_I2C_MVTWSI > diff --git a/include/configs/helios4.h b/include/configs/helios4.h > index 1368080f036b..b5814ed55cf2 100644 > --- a/include/configs/helios4.h > +++ b/include/configs/helios4.h > @@ -17,7 +17,6 @@ > * for DDR ECC byte filling in the SPL before loading the main > * U-Boot into it. > */ > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > > /* USB/EHCI configuration */ > #define CONFIG_EHCI_IS_TDI > diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h > index 0a824b79397c..18b9861160b0 100644 > --- a/include/configs/turris_omnia.h > +++ b/include/configs/turris_omnia.h > @@ -16,7 +16,6 @@ > * for DDR ECC byte filling in the SPL before loading the main > * U-Boot into it. > */ > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > > /* USB/EHCI configuration */ > #define CONFIG_EHCI_IS_TDI > diff --git a/include/configs/x530.h b/include/configs/x530.h > index 515c6e7ff45c..64d68276234c 100644 > --- a/include/configs/x530.h > +++ b/include/configs/x530.h > @@ -12,8 +12,6 @@ > > #define CONFIG_DISPLAY_BOARDINFO_LATE > > -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > - > /* > * NS16550 Configuration > */ > Viele Grüße, Stefan -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de