From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40579) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ezauE-0002fr-PW for qemu-devel@nongnu.org; Sat, 24 Mar 2018 00:35:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ezauB-0007Qe-M3 for qemu-devel@nongnu.org; Sat, 24 Mar 2018 00:35:50 -0400 Received: from mail-pf0-x22f.google.com ([2607:f8b0:400e:c00::22f]:37932) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ezauB-0007Q3-FK for qemu-devel@nongnu.org; Sat, 24 Mar 2018 00:35:47 -0400 Received: by mail-pf0-x22f.google.com with SMTP id d26so5499827pfn.5 for ; Fri, 23 Mar 2018 21:35:47 -0700 (PDT) References: <1521221171-47213-1-git-send-email-mjc@sifive.com> <75283674-1f4b-453c-0833-d84ab76a52cd@linaro.org> From: Richard Henderson Message-ID: <3e629c7d-c282-8cf1-859d-d5837c9350b7@linaro.org> Date: Sat, 24 Mar 2018 12:35:32 +0800 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3] RISC-V: Fix riscv_isa_string memory size bug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Clark Cc: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , Peter Maydell , Palmer Dabbelt , QEMU Developers , "Richard W.M. Jones" On 03/21/2018 02:06 AM, Michael Clark wrote: > Okay, so this would move byte swapping into TCG generic code instead of the TCG > backend, unless the backend explicitly supports load/store with byte swap?  Yes. r~