From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 925D4C432BE for ; Sat, 28 Aug 2021 15:47:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E0FF60E77 for ; Sat, 28 Aug 2021 15:47:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234474AbhH1Pss (ORCPT ); Sat, 28 Aug 2021 11:48:48 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:56753 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231368AbhH1Pss (ORCPT ); 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Sat, 28 Aug 2021 15:47:34 +0000 (UTC) Received: from [192.168.29.129] (unknown [49.36.87.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 070C9C4338F; Sat, 28 Aug 2021 15:47:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 070C9C4338F Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org Subject: Re: [PATCH v2 06/18] arm64: dts: qcom: sm6350: Add TLMM block node To: Konrad Dybcio , ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Rob Herring , Rob Herring , Mark Brown , Jonathan Cameron , Viresh Kumar , Sebastian Reichel , Sudeep Holla , Hector Martin , Vinod Koul , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org References: <20210828131814.29589-1-konrad.dybcio@somainline.org> <20210828131814.29589-6-konrad.dybcio@somainline.org> From: Maulik Shah Message-ID: <3f1dbbf3-8d62-e855-0dcf-740da7adb7df@codeaurora.org> Date: Sat, 28 Aug 2021 21:17:24 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20210828131814.29589-6-konrad.dybcio@somainline.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-GB Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On 8/28/2021 6:48 PM, Konrad Dybcio wrote: > Add TLMM pinctrl node to enable referencing the SoC pins in other nodes. > > Reviewed-by: AngeloGioacchino Del Regno > Signed-off-by: Konrad Dybcio > --- > Changes since v1: > - Fix the gpio ranges from 156 to 157 > > arch/arm64/boot/dts/qcom/sm6350.dtsi | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index d57c669ae0d6..03f7601457b4 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -406,6 +406,25 @@ pdc: interrupt-controller@b220000 { > interrupt-controller; > }; > > + tlmm: pinctrl@f100000 { > + compatible = "qcom,sm6350-tlmm"; > + reg = <0 0x0f100000 0 0x300000>; > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + ; you will not require other interrupts (209 to 216) for dual edge to work since you have below set in pinctrl-sm6350.c .wakeirq_dual_edge_errata = true, Thanks, Maulik > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + gpio-ranges = <&tlmm 0 0 157>; > + }; > + > intc: interrupt-controller@17a00000 { > compatible = "arm,gic-v3"; > #interrupt-cells = <3>; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation