Re: [PATCH] x86/entry/32: Fix setup of CS high bits

From: Jan Kiszka <jan.kiszka@siemens.com>
To: Andy Lutomirski <luto@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>,
	X86 ML <x86@kernel.org>, LKML <linux-kernel@vger.kernel.org>,
	Linux-MM <linux-mm@kvack.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Dave Hansen <dave.hansen@intel.com>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	Juergen Gross <jgross@suse.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Borislav Petkov <bp@alien8.de>, Jiri Kosina <jkosina@suse.cz>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Brian Gerst <brgerst@gmail.com>,
	David Laight <David.Laight@aculab.com>,
	Denys Vlasenko <dvlasenk@redhat.com>,
	Eduardo Valentin <eduval@amazon.com>,
	Greg KH <gregkh@linuxfoundation.org>,
	Will Deacon <will.deacon@arm.com>,
	"Liguori, Anthony" <aliguori@amazon.com>,
	Daniel Gruss <daniel.gruss@iaik.tugraz.at>,
	Hugh Dickins <hughd@google.com>, Kees Cook <keescook@google.com>,
	Andrea Arcangeli <aarcange@redhat.com>
Subject: Re: [PATCH] x86/entry/32: Fix setup of CS high bits
Date: Mon, 15 Oct 2018 15:08:54 +0200	[thread overview]
Message-ID: <406a08c7-6199-a32d-d385-c032fb4c34d6@siemens.com> (raw)
In-Reply-To: <CALCETrWveao7jthnfKr5F=UyEpyowP0VA20eZi5OxizgT05EDA@mail.gmail.com>

On 13.10.18 17:12, Andy Lutomirski wrote:
> On Sat, Oct 13, 2018 at 3:02 AM Jan Kiszka <jan.kiszka@web.de> wrote:
>>
>> From: Jan Kiszka <jan.kiszka@siemens.com>
>>
>> Even if we are not on an entry stack, we have to initialize the CS high
>> bits because we are unconditionally evaluating them
>> PARANOID_EXIT_TO_KERNEL_MODE. Failing to do so broke the boot on Galileo
>> Gen2 and IOT2000 boards.
>>
>> Fixes: b92a165df17e ("x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack")
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> ---
>>   arch/x86/entry/entry_32.S | 12 ++++++------
>>   1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
>> index 2767c625a52c..95c94d48ecd2 100644
>> --- a/arch/x86/entry/entry_32.S
>> +++ b/arch/x86/entry/entry_32.S
>> @@ -389,6 +389,12 @@
>>           * that register for the time this macro runs
>>           */
>>
>> +       /*
>> +        * Clear unused upper bits of the dword containing the word-sized CS
>> +        * slot in pt_regs in case hardware didn't clear it for us.
>> +        */
>> +       andl    $(0x0000ffff), PT_CS(%esp)
>> +
> 
> Please improve the comment. Since commit:
> 
> commit 385eca8f277c4c34f361a4c3a088fd876d29ae21
> Author: Andy Lutomirski <luto@kernel.org>
> Date:   Fri Jul 28 06:00:30 2017 -0700
> 
>      x86/asm/32: Make pt_regs's segment registers be 16 bits
> 
> Those fields are genuinely 16 bit.  So the comment should say
> something like "Those high bits are used for CS_FROM_ENTRY_STACK and
> CS_FROM_USER_CR3".

/*
  * The high bits of the CS dword (__csh) are used for
  * CS_FROM_ENTRY_STACK and CS_FROM_USER_CR3. Clear them in case
  * hardware didn't do this for us.
  */

OK? I will send out v2 with this wording soon.

> 
> Also, can you fold something like this in:
> 
> diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
> index 2767c625a52c..358eed8cf62a 100644
> --- a/arch/x86/entry/entry_32.S
> +++ b/arch/x86/entry/entry_32.S
> @@ -171,7 +171,7 @@
>          ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
>          .if \no_user_check == 0
>          /* coming from usermode? */
> -       testl   $SEGMENT_RPL_MASK, PT_CS(%esp)
> +       testb   $SEGMENT_RPL_MASK, PT_CS(%esp)
>          jz      .Lend_\@
>          .endif
>          /* On user-cr3? */
> 

Makes sense, but this looks like a separate patch to me.

Jan

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