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* [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support
@ 2021-09-27 21:03 Robert Marko
  2021-09-29  5:12 ` Stefan Roese
  2021-09-29  7:47 ` Stefan Roese
  0 siblings, 2 replies; 3+ messages in thread
From: Robert Marko @ 2021-09-27 21:03 UTC (permalink / raw)
  To: sr, kostap, u-boot; +Cc: Robert Marko

During the migration to a single DTSI for the CP110-s specific pinctrl
compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics.
Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting
the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect
the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor.

So, the mvebu-pinctrl driver check specifically for the
"marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit.

Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl"
for CP0 and "marvell,8k-cps-pinctrl" for the CP1.
This is obviously incorrect as the pinctrl driver does not know about these.

So fix the regression by applying correct compatibles to the DTSI.
Regression found and tested on the Puzzle M801 board.

Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 arch/arm/dts/armada-8040.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi
index 5123742b8d..eec5fa2774 100644
--- a/arch/arm/dts/armada-8040.dtsi
+++ b/arch/arm/dts/armada-8040.dtsi
@@ -40,7 +40,7 @@
 };
 
 &cp0_pinctl {
-	compatible = "marvell,mvebu-pinctrl", "marvell,8k-cpm-pinctrl";
+	compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cpm-pinctrl";
 	bank-name ="cp0-110";
 
 	cp0_i2c0_pins: cp0-i2c-pins-0 {
@@ -75,7 +75,7 @@
 };
 
 &cp1_pinctl {
-	compatible = "marvell,mvebu-pinctrl", "marvell,8k-cps-pinctrl";
+	compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cps-pinctrl";
 	bank-name ="cp1-110";
 
 	cp1_ge1_rgmii_pins: cp1-ge-rgmii-pins-0 {
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support
  2021-09-27 21:03 [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support Robert Marko
@ 2021-09-29  5:12 ` Stefan Roese
  2021-09-29  7:47 ` Stefan Roese
  1 sibling, 0 replies; 3+ messages in thread
From: Stefan Roese @ 2021-09-29  5:12 UTC (permalink / raw)
  To: Robert Marko, kostap, u-boot

On 27.09.21 23:03, Robert Marko wrote:
> During the migration to a single DTSI for the CP110-s specific pinctrl
> compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics.
> Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting
> the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect
> the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor.
> 
> So, the mvebu-pinctrl driver check specifically for the
> "marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit.
> 
> Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl"
> for CP0 and "marvell,8k-cps-pinctrl" for the CP1.
> This is obviously incorrect as the pinctrl driver does not know about these.
> 
> So fix the regression by applying correct compatibles to the DTSI.
> Regression found and tested on the Puzzle M801 board.
> 
> Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description")
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

Thanks for catching this:

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
>   arch/arm/dts/armada-8040.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi
> index 5123742b8d..eec5fa2774 100644
> --- a/arch/arm/dts/armada-8040.dtsi
> +++ b/arch/arm/dts/armada-8040.dtsi
> @@ -40,7 +40,7 @@
>   };
>   
>   &cp0_pinctl {
> -	compatible = "marvell,mvebu-pinctrl", "marvell,8k-cpm-pinctrl";
> +	compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cpm-pinctrl";
>   	bank-name ="cp0-110";
>   
>   	cp0_i2c0_pins: cp0-i2c-pins-0 {
> @@ -75,7 +75,7 @@
>   };
>   
>   &cp1_pinctl {
> -	compatible = "marvell,mvebu-pinctrl", "marvell,8k-cps-pinctrl";
> +	compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cps-pinctrl";
>   	bank-name ="cp1-110";
>   
>   	cp1_ge1_rgmii_pins: cp1-ge-rgmii-pins-0 {
> 


Viele Grüße,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support
  2021-09-27 21:03 [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support Robert Marko
  2021-09-29  5:12 ` Stefan Roese
@ 2021-09-29  7:47 ` Stefan Roese
  1 sibling, 0 replies; 3+ messages in thread
From: Stefan Roese @ 2021-09-29  7:47 UTC (permalink / raw)
  To: Robert Marko, kostap, u-boot

On 27.09.21 23:03, Robert Marko wrote:
> During the migration to a single DTSI for the CP110-s specific pinctrl
> compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics.
> Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting
> the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect
> the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor.
> 
> So, the mvebu-pinctrl driver check specifically for the
> "marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit.
> 
> Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl"
> for CP0 and "marvell,8k-cps-pinctrl" for the CP1.
> This is obviously incorrect as the pinctrl driver does not know about these.
> 
> So fix the regression by applying correct compatibles to the DTSI.
> Regression found and tested on the Puzzle M801 board.
> 
> Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description")
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

Applied to u-boot-marvell/master

Thanks,
Stefan

> ---
>   arch/arm/dts/armada-8040.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi
> index 5123742b8d..eec5fa2774 100644
> --- a/arch/arm/dts/armada-8040.dtsi
> +++ b/arch/arm/dts/armada-8040.dtsi
> @@ -40,7 +40,7 @@
>   };
>   
>   &cp0_pinctl {
> -	compatible = "marvell,mvebu-pinctrl", "marvell,8k-cpm-pinctrl";
> +	compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cpm-pinctrl";
>   	bank-name ="cp0-110";
>   
>   	cp0_i2c0_pins: cp0-i2c-pins-0 {
> @@ -75,7 +75,7 @@
>   };
>   
>   &cp1_pinctl {
> -	compatible = "marvell,mvebu-pinctrl", "marvell,8k-cps-pinctrl";
> +	compatible = "marvell,mvebu-pinctrl", "marvell,armada-8k-cps-pinctrl";
>   	bank-name ="cp1-110";
>   
>   	cp1_ge1_rgmii_pins: cp1-ge-rgmii-pins-0 {
> 


Viele Grüße,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-09-29  7:47 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-09-27 21:03 [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support Robert Marko
2021-09-29  5:12 ` Stefan Roese
2021-09-29  7:47 ` Stefan Roese

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