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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org, chenhc@lemote.com,
	paul.burton@mips.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] MIPS: Introduce aligned IO memory operations
Date: Sat, 25 Jan 2020 11:31:00 +0800	[thread overview]
Message-ID: <41DEDE07-DBA6-4397-A6F5-07D650436A6A@flygoat.com> (raw)
In-Reply-To: <20200124140751.GA17030@alpha.franken.de>



于 2020年1月24日 GMT+08:00 下午10:07:51, Thomas Bogendoerfer <tsbogend@alpha.franken.de> 写到:
>On Wed, Jan 22, 2020 at 10:45:06AM -0800, Paul Burton wrote:
>> Hi Jiaxun,
>> 
>> On Tue, Jan 14, 2020 at 08:23:43PM +0800, Jiaxun Yang wrote:
>> > Some platforms, such as Loongson64 or QEMU/KVM, don't support
>unaligned
>> > instructions like lwl or lwr in IO memory access. However, our
>current
>> > IO memcpy/memset is wired to the generic implementation, which
>leads
>> > to a fatal result.
>> 
>> Hmm, I wonder if we should just do this unconditionally on all
>systems.
>> I can't think of a reason it'd ever be a good idea to use lwl/lwr on
>an
>> MMIO device. Any thoughts on that?
>
>depends on the type of device. I can see benefits for framebuffers
>and memory devices since memset/memcpy are more optimised than the
>function in this patch.

lwl/lwr is slower than this implementation on your system?
I thought that other platforms support unaligned request can be benefited from speed up of these instructions.

>
>Thomas.

-- 
Jiaxun Yang

      reply	other threads:[~2020-01-25  3:31 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-14 12:23 [PATCH] MIPS: Introduce aligned IO memory operations Jiaxun Yang
2020-01-18 14:41 ` Philippe Mathieu-Daudé
2020-01-18 15:13   ` Jiaxun Yang
2020-01-22 18:45 ` Paul Burton
2020-01-24 14:07   ` Thomas Bogendoerfer
2020-01-25  3:31     ` Jiaxun Yang [this message]

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