From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933109AbdDEKBN (ORCPT ); Wed, 5 Apr 2017 06:01:13 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:47464 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933081AbdDEJ7f (ORCPT ); Wed, 5 Apr 2017 05:59:35 -0400 Subject: Re: [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY To: Maxime Ripard , Icenowy Zheng References: <20170404184518.33610-1-icenowy@aosc.io> <20170405070351.etpupeqjeo7dhyxl@lukather> CC: Chen-Yu Tsai , , , , From: Kishon Vijay Abraham I Message-ID: <41abab5b-1776-4cd4-f280-bfa7f69db9ad@ti.com> Date: Wed, 5 Apr 2017 15:29:00 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20170405070351.etpupeqjeo7dhyxl@lukather> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 05 April 2017 12:33 PM, Maxime Ripard wrote: > On Wed, Apr 05, 2017 at 02:45:16AM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a switchable PHY0 like the one in H3, which >> can switch between a MUSB controller and a pair of OHCI/EHCI controller. >> >> Enable PHY0 route auto switching for A64. >> >> Signed-off-by: Icenowy Zheng > > Acked-by: Maxime Ripard merged, thanks. -Kishon From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Subject: Re: [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Date: Wed, 5 Apr 2017 15:29:00 +0530 Message-ID: <41abab5b-1776-4cd4-f280-bfa7f69db9ad@ti.com> References: <20170404184518.33610-1-icenowy@aosc.io> <20170405070351.etpupeqjeo7dhyxl@lukather> Reply-To: kishon-l0cyMroinI0@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20170405070351.etpupeqjeo7dhyxl@lukather> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard , Icenowy Zheng Cc: Chen-Yu Tsai , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org On Wednesday 05 April 2017 12:33 PM, Maxime Ripard wrote: > On Wed, Apr 05, 2017 at 02:45:16AM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a switchable PHY0 like the one in H3, which >> can switch between a MUSB controller and a pair of OHCI/EHCI controller. >> >> Enable PHY0 route auto switching for A64. >> >> Signed-off-by: Icenowy Zheng > > Acked-by: Maxime Ripard merged, thanks. -Kishon From mboxrd@z Thu Jan 1 00:00:00 1970 From: kishon@ti.com (Kishon Vijay Abraham I) Date: Wed, 5 Apr 2017 15:29:00 +0530 Subject: [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY In-Reply-To: <20170405070351.etpupeqjeo7dhyxl@lukather> References: <20170404184518.33610-1-icenowy@aosc.io> <20170405070351.etpupeqjeo7dhyxl@lukather> Message-ID: <41abab5b-1776-4cd4-f280-bfa7f69db9ad@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wednesday 05 April 2017 12:33 PM, Maxime Ripard wrote: > On Wed, Apr 05, 2017 at 02:45:16AM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a switchable PHY0 like the one in H3, which >> can switch between a MUSB controller and a pair of OHCI/EHCI controller. >> >> Enable PHY0 route auto switching for A64. >> >> Signed-off-by: Icenowy Zheng > > Acked-by: Maxime Ripard merged, thanks. -Kishon