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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: Laurent Vivier <laurent@vivier.eu>, qemu-devel@nongnu.org
Subject: Re: [PATCH 6/8] q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in classic mode
Date: Sun, 17 Oct 2021 11:07:36 +0100	[thread overview]
Message-ID: <422aa27a-8090-9a17-a3f8-3bda87e76c2e@ilande.co.uk> (raw)
In-Reply-To: <679f9de8-bddb-07e6-1a3a-2871588a7afc@vivier.eu>

On 16/10/2021 19:08, Laurent Vivier wrote:

> Le 13/10/2021 à 23:21, Mark Cave-Ayland a écrit :
>> When the hardware is operating in classic mode the SONIC on-board Ethernet IRQ is
>> routed to nubus IRQ 9 instead of directly to the CPU at level 3. This does not
>> affect the framebuffer which although it exists in slot 9, has its own
>> dedicated IRQ on the Quadra 800 hardware.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> ---
>>   hw/m68k/q800.c | 57 ++++++++++++++++++++++++++++++++++++++++----------
>>   1 file changed, 46 insertions(+), 11 deletions(-)
>>
>> diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
>> index 0093872d89..d55e6a7541 100644
>> --- a/hw/m68k/q800.c
>> +++ b/hw/m68k/q800.c
>> @@ -101,6 +101,7 @@ struct GLUEState {
>>       M68kCPU *cpu;
>>       uint8_t ipr;
>>       uint8_t auxmode;
>> +    qemu_irq irqs[1];
>>   };
>>   
>>   #define GLUE_IRQ_IN_VIA1       0
>> @@ -108,27 +109,50 @@ struct GLUEState {
>>   #define GLUE_IRQ_IN_SONIC      2
>>   #define GLUE_IRQ_IN_ESCC       3
>>   
>> +#define GLUE_IRQ_NUBUS_9       0
>> +
>>   static void GLUE_set_irq(void *opaque, int irq, int level)
>>   {
>>       GLUEState *s = opaque;
>>       int i;
>>   
>> -    switch (irq) {
>> -    case GLUE_IRQ_IN_VIA1:
>> -        irq = 5;
>> -        break;
>> +    switch (s->auxmode) {
>> +    case 0:
> 
> why don't you use "if () {} else {}" rather than "switch() { case 0: ; case 1: }" ?
> (I don't think we need to manage a "default:" case.)

Sure, I can do that: I used the switch()/default originally to make sure the irq 
wasn't being set to an unexpected value.

I've also just spotted that the comment in this patch is incorrect:

     /*
      * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
      * IRQ via GLUE for use by SONIC Ethernet in A/UX mode
      */

This should be classic mode, of course.


ATB,

Mark.


  reply	other threads:[~2021-10-17 10:08 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-13 21:21 [PATCH 0/8] q800: GLUE updates for A/UX mode Mark Cave-Ayland
2021-10-13 21:21 ` [PATCH 1/8] mac_via: update comment for VIA1B_vMystery bit Mark Cave-Ayland
2021-10-15  6:14   ` Laurent Vivier
2021-10-15 19:30     ` Mark Cave-Ayland
2021-10-13 21:21 ` [PATCH 2/8] q800: move VIA1 IRQ from level 1 to level 6 Mark Cave-Ayland
2021-10-15  6:24   ` Laurent Vivier
2021-10-13 21:21 ` [PATCH 3/8] q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs Mark Cave-Ayland
2021-10-15  6:31   ` Laurent Vivier
2021-10-15  8:51     ` BALATON Zoltan
2021-10-15 19:42     ` Mark Cave-Ayland
2021-10-17  9:40     ` Mark Cave-Ayland
2021-10-17 13:30       ` Laurent Vivier
2021-10-13 21:21 ` [PATCH 4/8] mac_via: add GPIO for A/UX mode Mark Cave-Ayland
2021-10-15  6:58   ` Laurent Vivier
2021-10-15 19:50     ` Mark Cave-Ayland
2021-10-16 17:04       ` Laurent Vivier
2021-10-15  7:17   ` Laurent Vivier
2021-10-15 19:59     ` Mark Cave-Ayland
2021-10-16 17:06       ` Laurent Vivier
2021-10-13 21:21 ` [PATCH 5/8] q800: wire up auxmode GPIO to GLUE Mark Cave-Ayland
2021-10-15  7:01   ` Laurent Vivier
2021-10-16 18:00   ` Laurent Vivier
2021-10-13 21:21 ` [PATCH 6/8] q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in classic mode Mark Cave-Ayland
2021-10-16 18:08   ` Laurent Vivier
2021-10-17 10:07     ` Mark Cave-Ayland [this message]
2021-10-13 21:21 ` [PATCH 7/8] q800: wire up remaining IRQs " Mark Cave-Ayland
2021-10-16 18:09   ` Laurent Vivier
2021-10-13 21:21 ` [PATCH 8/8] q800: add NMI handler Mark Cave-Ayland
2021-10-15  8:40   ` Laurent Vivier
2021-10-15 20:12     ` Mark Cave-Ayland
2021-10-16 17:09       ` Laurent Vivier
2021-10-17 10:00         ` Mark Cave-Ayland
2021-10-17 16:56           ` Laurent Vivier
2021-10-20 13:32             ` Mark Cave-Ayland

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