From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756124AbcJ2MWD (ORCPT ); Sat, 29 Oct 2016 08:22:03 -0400 Received: from mx4-phx2.redhat.com ([209.132.183.25]:52601 "EHLO mx4-phx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755088AbcJ2MWB (ORCPT ); Sat, 29 Oct 2016 08:22:01 -0400 Date: Sat, 29 Oct 2016 08:21:17 -0400 (EDT) From: Paolo Bonzini To: Borislav Petkov Cc: Piotr Luc , kvm@vger.kernel.org, he chen , linux-kernel@vger.kernel.org, tglx@linutronix.de, x86@kernel.org, hpa@zytor.com, mingo@redhat.com, Luwei Kang , rkrcmar@redhat.com Message-ID: <425702906.9319122.1477743677017.JavaMail.zimbra@redhat.com> In-Reply-To: <20161028122123.24i3synevehn6r3p@pd.tnic> References: <1477645960-6898-1-git-send-email-he.chen@linux.intel.com> <1477649272.17668.7.camel@intel.com> <5c00fdf0-a5a4-7a78-4ed8-8ae3ef710a68@redhat.com> <20161028110834.svzzs5hftg3bybiz@pd.tnic> <20161028122123.24i3synevehn6r3p@pd.tnic> Subject: Re: [PATCH] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Originating-IP: [10.4.164.1, 10.5.101.130] X-Mailer: Zimbra 8.0.6_GA_5922 (ZimbraWebClient - FF49 (Linux)/8.0.6_GA_5922) Thread-Topic: x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest Thread-Index: o5nJlknqA6thoL7xfkiU8dFvF/fNFg== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ----- Original Message ----- > From: "Borislav Petkov" > To: "Paolo Bonzini" > Cc: "Piotr Luc" , kvm@vger.kernel.org, "he chen" , > linux-kernel@vger.kernel.org, tglx@linutronix.de, x86@kernel.org, hpa@zytor.com, mingo@redhat.com, "Luwei Kang" > , rkrcmar@redhat.com > Sent: Friday, October 28, 2016 2:21:23 PM > Subject: Re: [PATCH] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest > > On Fri, Oct 28, 2016 at 02:07:21PM +0200, Paolo Bonzini wrote: > > cpuid_count_edx would be just > > > > static inline unsigned int cpuid_count_edx(unsigned op, unsigned count) > > { > > unsigned int eax, ebx, ecx, edx; > > > > cpuid_count(op, count, &eax, &ebx, &ecx, &edx); > > > > return edx; > > } > > Even better. > > But shouldn't this be hiding unimplemented CPUID bits from the guest? Currently none of the bits in CPUID[7,0].edx is ever masked by the host, so this would be enough. If we ever need to do some masking, I guess I'll practice my puss-in-boots look and submit a patch to add CPUID[7,0] back as a separate cpufeature entr. Paolo