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From: Jerry Crunchtime <jerry.c.t@web.de>
To: bpf@vger.kernel.org, daniel@iogearbox.net
Subject: [PATCH bpf v2] libbpf: Fix register in PT_REGS MIPS macros
Date: Fri, 31 Jul 2020 13:13:26 +0200	[thread overview]
Message-ID: <43707d31-0210-e8f0-9226-1af140907641@web.de> (raw)

v1 -> v2: Also fixed missed PT_REGS_RC_CORE macro

Hi.

The o32, n32 and n64 calling conventions require the return
value to be stored in $v0 which maps to $2 register, i.e.,
the register 2.

Fixes: c1932cd ("bpf: Add MIPS support to samples/bpf.")
Signed-off-by: Jerry Crunchtime <jerry.c.t@web.de>
---
  tools/lib/bpf/bpf_tracing.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h
index 58eceb884..eebf020cb 100644
--- a/tools/lib/bpf/bpf_tracing.h
+++ b/tools/lib/bpf/bpf_tracing.h
@@ -215,7 +215,7 @@ struct pt_regs;
  #define PT_REGS_PARM5(x) ((x)->regs[8])
  #define PT_REGS_RET(x) ((x)->regs[31])
  #define PT_REGS_FP(x) ((x)->regs[30]) /* Works only with
CONFIG_FRAME_POINTER */
-#define PT_REGS_RC(x) ((x)->regs[1])
+#define PT_REGS_RC(x) ((x)->regs[2])
  #define PT_REGS_SP(x) ((x)->regs[29])
  #define PT_REGS_IP(x) ((x)->cp0_epc)

@@ -226,7 +226,7 @@ struct pt_regs;
  #define PT_REGS_PARM5_CORE(x) BPF_CORE_READ((x), regs[8])
  #define PT_REGS_RET_CORE(x) BPF_CORE_READ((x), regs[31])
  #define PT_REGS_FP_CORE(x) BPF_CORE_READ((x), regs[30])
-#define PT_REGS_RC_CORE(x) BPF_CORE_READ((x), regs[1])
+#define PT_REGS_RC_CORE(x) BPF_CORE_READ((x), regs[2])
  #define PT_REGS_SP_CORE(x) BPF_CORE_READ((x), regs[29])
  #define PT_REGS_IP_CORE(x) BPF_CORE_READ((x), cp0_epc)

--
2.17.1

             reply	other threads:[~2020-07-31 11:13 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-31 11:13 Jerry Crunchtime [this message]
2020-07-31 15:27 ` [PATCH bpf v2] libbpf: Fix register in PT_REGS MIPS macros Daniel Borkmann

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