From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MIME_BASE64_TEXT,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DD36C2BB55 for ; Fri, 10 Apr 2020 08:55:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 64B30207FF for ; Fri, 10 Apr 2020 08:55:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="saIPKymD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726652AbgDJIzO (ORCPT ); Fri, 10 Apr 2020 04:55:14 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49894 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726143AbgDJIzO (ORCPT ); Fri, 10 Apr 2020 04:55:14 -0400 X-UUID: ae47a5537b214724a924ebb8fa3ca3a9-20200410 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=lcRSBm2Qn6zLQZp4CLET2NDgyS8tMHUGD+d1o/f5bOM=; b=saIPKymDudhOie3aHc4hY6fFZjq5Sm7fcB82h1U4Q9HMedC5QxaOVn+rNQKtpHUOAubvrF6tC5fTC6XHGgjzxMpzI4V6acEUbc/HAGZmh8uz0LwYbyLfQe8VYkAWt+wqlH6SePMmn1rBr+AEaQilvYQZQsqJqb6RintBssd3vWg=; X-UUID: ae47a5537b214724a924ebb8fa3ca3a9-20200410 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 698028075; Fri, 10 Apr 2020 16:55:00 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 10 Apr 2020 16:54:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 10 Apr 2020 16:54:57 +0800 From: Ryder Lee To: Felix Fietkau , Lorenzo Bianconi CC: Shayne Chen , YF Luo , Yiwei Chung , Chih-Min Chen , Evelyn Tsai , Sean Wang , , , Ryder Lee Subject: [PATCH 07/16] mt76: mt7915: implement HE per-rate tx power support Date: Fri, 10 Apr 2020 16:54:44 +0800 Message-ID: <44776fec051db7ef48785046658946eaf553cd18.1586507878.git.ryder.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: E21AE195C7B3B0582B79215EF17D2769D3183252E033B9999B426719721AEC0F2000:8 X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org VXNlIGZpcm13YXJlIHN1cHBvcnQgZm9yIGFwcGx5aW5nIHBlci1yYXRlIGxpbWl0IGFuZCBwb3dl ciBvZmZzZXRzLg0KVGhpcyBjYW4gc3VwcG9ydCBhbGwgSEUgUlUgdHlwZXMuDQoNClNpZ25lZC1v ZmYtYnk6IFNoYXluZSBDaGVuIDxzaGF5bmUuY2hlbkBtZWRpYXRlay5jb20+DQpTaWduZWQtb2Zm LWJ5OiBSeWRlciBMZWUgPHJ5ZGVyLmxlZUBtZWRpYXRlay5jb20+DQpUZXN0ZWQtYnk6IENoaWgt TWluIENoZW4gPGNoaWgtbWluLmNoZW5AbWVkaWF0ZWsuY29tPg0KVGVzdGVkLWJ5OiBFdmVseW4g VHNhaSA8ZXZlbHluLnRzYWlAbWVkaWF0ZWsuY29tPg0KQWNrZWQtYnk6IFlpd2VpIENodW5nIDx5 aXdlaS5jaHVuZ0BtZWRpYXRlay5jb20+DQpBY2tlZC1ieTogWUYgTHVvIDx5Zi5sdW9AbWVkaWF0 ZWsuY29tPg0KLS0tDQogLi4uL3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2RlYnVnZnMu YyAgIHwgIDU2ICsrKysrKysrKw0KIC4uLi93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS9l ZXByb20uYyAgICB8IDExMSArKysrKysrKysrKysrKysrKysNCiAuLi4vd2lyZWxlc3MvbWVkaWF0 ZWsvbXQ3Ni9tdDc5MTUvZWVwcm9tLmggICAgfCAgNDcgKysrKysrKysNCiAuLi4vbmV0L3dpcmVs ZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2luaXQuYyAgfCAgIDIgKw0KIC4uLi9uZXQvd2lyZWxl c3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvbWFpbi5jICB8ICAgNyArKw0KIC4uLi9uZXQvd2lyZWxl c3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvbWN1LmMgICB8ICA0OSArKysrKysrKw0KIC4uLi9uZXQv d2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvbWN1LmggICB8ICAgMSArDQogLi4uL3dpcmVs ZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L210NzkxNS5oICAgIHwgICA2ICsNCiAuLi4vbmV0L3dp cmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L3BjaS5jICAgfCAgMjYgKysrKw0KIDkgZmlsZXMg Y2hhbmdlZCwgMzA1IGluc2VydGlvbnMoKykNCg0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvbmV0L3dp cmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2RlYnVnZnMuYyBiL2RyaXZlcnMvbmV0L3dpcmVs ZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2RlYnVnZnMuYw0KaW5kZXggMTUyYWUwNjE3ZjNkLi4z NGRmMmQ4Y2RiOGYgMTAwNjQ0DQotLS0gYS9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9t dDc2L210NzkxNS9kZWJ1Z2ZzLmMNCisrKyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVr L210NzYvbXQ3OTE1L2RlYnVnZnMuYw0KQEAgLTIxOSw2ICsyMTksNjAgQEAgbXQ3OTE1X3F1ZXVl c19yZWFkKHN0cnVjdCBzZXFfZmlsZSAqcywgdm9pZCAqZGF0YSkNCiAJcmV0dXJuIDA7DQogfQ0K IA0KK3N0YXRpYyB2b2lkDQorbXQ3OTE1X3B1dHNfcmF0ZV90eHBvd2VyKHN0cnVjdCBzZXFfZmls ZSAqcywgczggKmRlbHRhLA0KKwkJCSBzOCB0eHBvd2VyX2N1ciwgaW50IGJhbmQpDQorew0KKwlz dGF0aWMgY29uc3QgY2hhciAqIGNvbnN0IHNrdV9ncm91cF9uYW1lW10gPSB7DQorCQkiQ0NLIiwg Ik9GRE0iLCAiSFQyMCIsICJIVDQwIiwNCisJCSJWSFQyMCIsICJWSFQ0MCIsICJWSFQ4MCIsICJW SFQxNjAiLA0KKwkJIlJVMjYiLCAiUlU1MiIsICJSVTEwNiIsICJSVTI0Mi9TVTIwIiwNCisJCSJS VTQ4NC9TVTQwIiwgIlJVOTk2L1NVODAiLCAiUlUyeDk5Ni9TVTE2MCINCisJfTsNCisJczggdHhw b3dlcltNVDc5MTVfU0tVX1JBVEVfTlVNXTsNCisJaW50IGksIGlkeCA9IDA7DQorDQorCWZvciAo aSA9IDA7IGkgPCBNVDc5MTVfU0tVX1JBVEVfTlVNOyBpKyspDQorCQl0eHBvd2VyW2ldID0gdHhw b3dlcl9jdXIgKyBkZWx0YVtpXSAvIDI7DQorDQorCWZvciAoaSA9IDA7IGkgPCBNQVhfU0tVX1JB VEVfR1JPVVBfTlVNOyBpKyspIHsNCisJCWNvbnN0IHN0cnVjdCBza3VfZ3JvdXAgKnNrdSA9ICZt dDc5MTVfc2t1X2dyb3Vwc1tpXTsNCisJCXUzMiBvZmZzZXQgPSBza3UtPm9mZnNldFtiYW5kXTsN CisNCisJCWlmICghb2Zmc2V0KSB7DQorCQkJaWR4ICs9IHNrdS0+bGVuOw0KKwkJCWNvbnRpbnVl Ow0KKwkJfQ0KKw0KKwkJbXQ3Nl9zZXFfcHV0c19hcnJheShzLCBza3VfZ3JvdXBfbmFtZVtpXSwN CisJCQkJICAgIHR4cG93ZXIgKyBpZHgsIHNrdS0+bGVuKTsNCisJCWlkeCArPSBza3UtPmxlbjsN CisJfQ0KK30NCisNCitzdGF0aWMgaW50DQorbXQ3OTE1X3JlYWRfcmF0ZV90eHBvd2VyKHN0cnVj dCBzZXFfZmlsZSAqcywgdm9pZCAqZGF0YSkNCit7DQorCXN0cnVjdCBtdDc5MTVfZGV2ICpkZXYg PSBkZXZfZ2V0X2RydmRhdGEocy0+cHJpdmF0ZSk7DQorCXN0cnVjdCBtdDc2X3BoeSAqbXBoeSA9 ICZkZXYtPm1waHk7DQorCWVudW0gbmw4MDIxMV9iYW5kIGJhbmQgPSBtcGh5LT5jaGFuZGVmLmNo YW4tPmJhbmQ7DQorCXM4ICpkZWx0YSA9IGRldi0+cmF0ZV9wb3dlcltiYW5kXTsNCisNCisJc2Vx X3B1dHMocywgIkJhbmQgMDpcbiIpOw0KKwltdDc5MTVfcHV0c19yYXRlX3R4cG93ZXIocywgZGVs dGEsIG1waHktPnR4cG93ZXJfY3VyLCBiYW5kKTsNCisNCisJaWYgKGRldi0+bXQ3Ni5waHkyKSB7 DQorCQltcGh5ID0gZGV2LT5tdDc2LnBoeTI7DQorCQliYW5kID0gbXBoeS0+Y2hhbmRlZi5jaGFu LT5iYW5kOw0KKwkJZGVsdGEgPSBkZXYtPnJhdGVfcG93ZXJbYmFuZF07DQorDQorCQlzZXFfcHV0 cyhzLCAiQmFuZCAxOlxuIik7DQorCQltdDc5MTVfcHV0c19yYXRlX3R4cG93ZXIocywgZGVsdGEs IG1waHktPnR4cG93ZXJfY3VyLCBiYW5kKTsNCisJfQ0KKw0KKwlyZXR1cm4gMDsNCit9DQorDQog aW50IG10NzkxNV9pbml0X2RlYnVnZnMoc3RydWN0IG10NzkxNV9kZXYgKmRldikNCiB7DQogCXN0 cnVjdCBkZW50cnkgKmRpcjsNCkBAIC0yNDAsNiArMjk0LDggQEAgaW50IG10NzkxNV9pbml0X2Rl YnVnZnMoc3RydWN0IG10NzkxNV9kZXYgKmRldikNCiAJZGVidWdmc19jcmVhdGVfZmlsZSgic2Vy X3RyaWdnZXIiLCAwMjAwLCBkaXIsIGRldiwgJmZvcHNfc2VyX3RyaWdnZXIpOw0KIAlkZWJ1Z2Zz X2NyZWF0ZV9kZXZtX3NlcWZpbGUoZGV2LT5tdDc2LmRldiwgInRlbXBlcmF0dXJlIiwgZGlyLA0K IAkJCQkgICAgbXQ3OTE1X3JlYWRfdGVtcGVyYXR1cmUpOw0KKwlkZWJ1Z2ZzX2NyZWF0ZV9kZXZt X3NlcWZpbGUoZGV2LT5tdDc2LmRldiwgInR4cG93ZXJfc2t1IiwgZGlyLA0KKwkJCQkgICAgbXQ3 OTE1X3JlYWRfcmF0ZV90eHBvd2VyKTsNCiANCiAJcmV0dXJuIDA7DQogfQ0KZGlmZiAtLWdpdCBh L2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2VlcHJvbS5jIGIvZHJp dmVycy9uZXQvd2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvZWVwcm9tLmMNCmluZGV4IDIw OTlkZDQwNTMwZi4uNTI3MDY5NjhiZjZhIDEwMDY0NA0KLS0tIGEvZHJpdmVycy9uZXQvd2lyZWxl c3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvZWVwcm9tLmMNCisrKyBiL2RyaXZlcnMvbmV0L3dpcmVs ZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2VlcHJvbS5jDQpAQCAtMTIzLDMgKzEyMywxMTQgQEAg aW50IG10NzkxNV9lZXByb21fZ2V0X3RhcmdldF9wb3dlcihzdHJ1Y3QgbXQ3OTE1X2RldiAqZGV2 LA0KIA0KIAlyZXR1cm4gbXQ3OTE1X2VlcHJvbV9yZWFkKGRldiwgaW5kZXgpOw0KIH0NCisNCitz dGF0aWMgY29uc3QgdTggc2t1X2Nja19kZWx0YV9tYXBbXSA9IHsNCisJU0tVX0NDS19HUk9VUDAs DQorCVNLVV9DQ0tfR1JPVVAwLA0KKwlTS1VfQ0NLX0dST1VQMSwNCisJU0tVX0NDS19HUk9VUDEs DQorfTsNCisNCitzdGF0aWMgY29uc3QgdTggc2t1X29mZG1fZGVsdGFfbWFwW10gPSB7DQorCVNL VV9PRkRNX0dST1VQMCwNCisJU0tVX09GRE1fR1JPVVAwLA0KKwlTS1VfT0ZETV9HUk9VUDEsDQor CVNLVV9PRkRNX0dST1VQMSwNCisJU0tVX09GRE1fR1JPVVAyLA0KKwlTS1VfT0ZETV9HUk9VUDIs DQorCVNLVV9PRkRNX0dST1VQMywNCisJU0tVX09GRE1fR1JPVVA0LA0KK307DQorDQorc3RhdGlj IGNvbnN0IHU4IHNrdV9tY3NfZGVsdGFfbWFwW10gPSB7DQorCVNLVV9NQ1NfR1JPVVAwLA0KKwlT S1VfTUNTX0dST1VQMSwNCisJU0tVX01DU19HUk9VUDEsDQorCVNLVV9NQ1NfR1JPVVAyLA0KKwlT S1VfTUNTX0dST1VQMiwNCisJU0tVX01DU19HUk9VUDMsDQorCVNLVV9NQ1NfR1JPVVA0LA0KKwlT S1VfTUNTX0dST1VQNSwNCisJU0tVX01DU19HUk9VUDYsDQorCVNLVV9NQ1NfR1JPVVA3LA0KKwlT S1VfTUNTX0dST1VQOCwNCisJU0tVX01DU19HUk9VUDksDQorfTsNCisNCisjZGVmaW5lIFNLVV9H Uk9VUChfbW9kZSwgX2xlbiwgX29mc18yZywgX29mc181ZywgX21hcCkJXA0KKwlbX21vZGVdID0g ewkJCQkJXA0KKwkubGVuID0gX2xlbiwJCQkJCVwNCisJLm9mZnNldCA9IHsJCQkJCVwNCisJCV9v ZnNfMmcsCQkJCVwNCisJCV9vZnNfNWcsCQkJCVwNCisJfSwJCQkJCQlcDQorCS5kZWx0YV9tYXAg PSBfbWFwCQkJCVwNCit9DQorDQorY29uc3Qgc3RydWN0IHNrdV9ncm91cCBtdDc5MTVfc2t1X2dy b3Vwc1tdID0gew0KKwlTS1VfR1JPVVAoU0tVX0NDSywgNCwgMHgyNTIsIDAsIHNrdV9jY2tfZGVs dGFfbWFwKSwNCisJU0tVX0dST1VQKFNLVV9PRkRNLCA4LCAweDI1NCwgMHgyOWQsIHNrdV9vZmRt X2RlbHRhX21hcCksDQorDQorCVNLVV9HUk9VUChTS1VfSFRfQlcyMCwgOCwgMHgyNTksIDB4MmEy LCBza3VfbWNzX2RlbHRhX21hcCksDQorCVNLVV9HUk9VUChTS1VfSFRfQlc0MCwgOSwgMHgyNjIs IDB4MmFiLCBza3VfbWNzX2RlbHRhX21hcCksDQorCVNLVV9HUk9VUChTS1VfVkhUX0JXMjAsIDEy LCAweDI1OSwgMHgyYTIsIHNrdV9tY3NfZGVsdGFfbWFwKSwNCisJU0tVX0dST1VQKFNLVV9WSFRf Qlc0MCwgMTIsIDB4MjYyLCAweDJhYiwgc2t1X21jc19kZWx0YV9tYXApLA0KKwlTS1VfR1JPVVAo U0tVX1ZIVF9CVzgwLCAxMiwgMCwgMHgyYjQsIHNrdV9tY3NfZGVsdGFfbWFwKSwNCisJU0tVX0dS T1VQKFNLVV9WSFRfQlcxNjAsIDEyLCAwLCAwLCBza3VfbWNzX2RlbHRhX21hcCksDQorDQorCVNL VV9HUk9VUChTS1VfSEVfUlUyNiwgMTIsIDB4MjdmLCAweDJkZCwgc2t1X21jc19kZWx0YV9tYXAp LA0KKwlTS1VfR1JPVVAoU0tVX0hFX1JVNTIsIDEyLCAweDI4OSwgMHgyZTcsIHNrdV9tY3NfZGVs dGFfbWFwKSwNCisJU0tVX0dST1VQKFNLVV9IRV9SVTEwNiwgMTIsIDB4MjkzLCAweDJmMSwgc2t1 X21jc19kZWx0YV9tYXApLA0KKwlTS1VfR1JPVVAoU0tVX0hFX1JVMjQyLCAxMiwgMHgyNmIsIDB4 MmJmLCBza3VfbWNzX2RlbHRhX21hcCksDQorCVNLVV9HUk9VUChTS1VfSEVfUlU0ODQsIDEyLCAw eDI3NSwgMHgyYzksIHNrdV9tY3NfZGVsdGFfbWFwKSwNCisJU0tVX0dST1VQKFNLVV9IRV9SVTk5 NiwgMTIsIDAsIDB4MmQzLCBza3VfbWNzX2RlbHRhX21hcCksDQorCVNLVV9HUk9VUChTS1VfSEVf UlUyeDk5NiwgMTIsIDAsIDAsIHNrdV9tY3NfZGVsdGFfbWFwKSwNCit9Ow0KKw0KK3N0YXRpYyBz OA0KK210NzkxNV9nZXRfc2t1X2RlbHRhKHN0cnVjdCBtdDc5MTVfZGV2ICpkZXYsIHUzMiBhZGRy KQ0KK3sNCisJdTMyIHZhbCA9IG10NzkxNV9lZXByb21fcmVhZChkZXYsIGFkZHIpOw0KKwlzOCBk ZWx0YSA9IEZJRUxEX0dFVChTS1VfREVMVEFfVkFMLCB2YWwpOw0KKw0KKwlpZiAoISh2YWwgJiBT S1VfREVMVEFfRU4pKQ0KKwkJcmV0dXJuIDA7DQorDQorCXJldHVybiB2YWwgJiBTS1VfREVMVEFf QUREID8gZGVsdGEgOiAtZGVsdGE7DQorfQ0KKw0KK3N0YXRpYyB2b2lkDQorbXQ3OTE1X2VlcHJv bV9pbml0X3NrdV9iYW5kKHN0cnVjdCBtdDc5MTVfZGV2ICpkZXYsDQorCQkJICAgIHN0cnVjdCBp ZWVlODAyMTFfc3VwcG9ydGVkX2JhbmQgKnNiYW5kKQ0KK3sNCisJaW50IGksIGJhbmQgPSBzYmFu ZC0+YmFuZDsNCisJczggKnJhdGVfcG93ZXIgPSBkZXYtPnJhdGVfcG93ZXJbYmFuZF07DQorCXU4 IGlkeCA9IDA7DQorDQorCWZvciAoaSA9IDA7IGkgPCBBUlJBWV9TSVpFKG10NzkxNV9za3VfZ3Jv dXBzKTsgaSsrKSB7DQorCQljb25zdCBzdHJ1Y3Qgc2t1X2dyb3VwICpza3UgPSAmbXQ3OTE1X3Nr dV9ncm91cHNbaV07DQorCQl1MzIgb2Zmc2V0ID0gc2t1LT5vZmZzZXRbYmFuZF07DQorCQlpbnQg ajsNCisNCisJCWlmICghb2Zmc2V0KSB7DQorCQkJaWR4ICs9IHNrdS0+bGVuOw0KKwkJCWNvbnRp bnVlOw0KKwkJfQ0KKw0KKwkJcmF0ZV9wb3dlcltpZHgrK10gPSBtdDc5MTVfZ2V0X3NrdV9kZWx0 YShkZXYsIG9mZnNldCk7DQorCQlpZiAoaSA9PSBTS1VfSFRfQlcyMCB8fCBpID09IFNLVV9WSFRf QlcyMCkNCisJCQlvZmZzZXQgKz0gMTsNCisNCisJCWZvciAoaiA9IDE7IGogPCBza3UtPmxlbjsg aisrKSB7DQorCQkJdTMyIGFkZHIgPSBvZmZzZXQgKyBza3UtPmRlbHRhX21hcFtqXTsNCisNCisJ CQlyYXRlX3Bvd2VyW2lkeCsrXSA9IG10NzkxNV9nZXRfc2t1X2RlbHRhKGRldiwgYWRkcik7DQor CQl9DQorCX0NCit9DQorDQordm9pZCBtdDc5MTVfZWVwcm9tX2luaXRfc2t1KHN0cnVjdCBtdDc5 MTVfZGV2ICpkZXYpDQorew0KKwltdDc5MTVfZWVwcm9tX2luaXRfc2t1X2JhbmQoZGV2LCAmZGV2 LT5tcGh5LnNiYW5kXzJnLnNiYW5kKTsNCisJbXQ3OTE1X2VlcHJvbV9pbml0X3NrdV9iYW5kKGRl diwgJmRldi0+bXBoeS5zYmFuZF81Zy5zYmFuZCk7DQorfQ0KZGlmZiAtLWdpdCBhL2RyaXZlcnMv bmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2VlcHJvbS5oIGIvZHJpdmVycy9uZXQv d2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvZWVwcm9tLmgNCmluZGV4IDMwZmM2MDdlNDY2 ZC4uNGUzMWQ2YWI0ZmE2IDEwMDY0NA0KLS0tIGEvZHJpdmVycy9uZXQvd2lyZWxlc3MvbWVkaWF0 ZWsvbXQ3Ni9tdDc5MTUvZWVwcm9tLmgNCisrKyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlh dGVrL210NzYvbXQ3OTE1L2VlcHJvbS5oDQpAQCAtMzcsNiArMzcsNTEgQEAgZW51bSBtdDc5MTVf ZWVwcm9tX2JhbmQgew0KIAlNVF9FRV9EQkRDLA0KIH07DQogDQorI2RlZmluZSBTS1VfREVMVEFf VkFMCQlHRU5NQVNLKDUsIDApDQorI2RlZmluZSBTS1VfREVMVEFfQURECQlCSVQoNikNCisjZGVm aW5lIFNLVV9ERUxUQV9FTgkJQklUKDcpDQorDQorZW51bSBtdDc5MTVfc2t1X2RlbHRhX2dyb3Vw IHsNCisJU0tVX0NDS19HUk9VUDAsDQorCVNLVV9DQ0tfR1JPVVAxLA0KKw0KKwlTS1VfT0ZETV9H Uk9VUDAgPSAwLA0KKwlTS1VfT0ZETV9HUk9VUDEsDQorCVNLVV9PRkRNX0dST1VQMiwNCisJU0tV X09GRE1fR1JPVVAzLA0KKwlTS1VfT0ZETV9HUk9VUDQsDQorDQorCVNLVV9NQ1NfR1JPVVAwID0g MCwNCisJU0tVX01DU19HUk9VUDEsDQorCVNLVV9NQ1NfR1JPVVAyLA0KKwlTS1VfTUNTX0dST1VQ MywNCisJU0tVX01DU19HUk9VUDQsDQorCVNLVV9NQ1NfR1JPVVA1LA0KKwlTS1VfTUNTX0dST1VQ NiwNCisJU0tVX01DU19HUk9VUDcsDQorCVNLVV9NQ1NfR1JPVVA4LA0KKwlTS1VfTUNTX0dST1VQ OSwNCit9Ow0KKw0KK2VudW0gbXQ3OTE1X3NrdV9yYXRlX2dyb3VwIHsNCisJU0tVX0NDSywNCisJ U0tVX09GRE0sDQorCVNLVV9IVF9CVzIwLA0KKwlTS1VfSFRfQlc0MCwNCisJU0tVX1ZIVF9CVzIw LA0KKwlTS1VfVkhUX0JXNDAsDQorCVNLVV9WSFRfQlc4MCwNCisJU0tVX1ZIVF9CVzE2MCwNCisJ U0tVX0hFX1JVMjYsDQorCVNLVV9IRV9SVTUyLA0KKwlTS1VfSEVfUlUxMDYsDQorCVNLVV9IRV9S VTI0MiwNCisJU0tVX0hFX1JVNDg0LA0KKwlTS1VfSEVfUlU5OTYsDQorCVNLVV9IRV9SVTJ4OTk2 LA0KKwlNQVhfU0tVX1JBVEVfR1JPVVBfTlVNLA0KK307DQorDQogc3RydWN0IHNrdV9ncm91cCB7 DQogCXU4IGxlbjsNCiAJdTE2IG9mZnNldFsyXTsNCkBAIC03NSw0ICsxMjAsNiBAQCBtdDc5MTVf dHNzaV9lbmFibGVkKHN0cnVjdCBtdDc5MTVfZGV2ICpkZXYsIGVudW0gbmw4MDIxMV9iYW5kIGJh bmQpDQogCQlyZXR1cm4gZWVwW01UX0VFX1dJRklfQ09ORiArIDddICYgTVRfRUVfV0lGSV9DT05G X1RTU0kwXzJHOw0KIH0NCiANCitleHRlcm4gY29uc3Qgc3RydWN0IHNrdV9ncm91cCBtdDc5MTVf c2t1X2dyb3Vwc1tdOw0KKw0KICNlbmRpZg0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvbmV0L3dpcmVs ZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L2luaXQuYyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21l ZGlhdGVrL210NzYvbXQ3OTE1L2luaXQuYw0KaW5kZXggMGUzZTZiMTU0N2IzLi5jYmE5ZGZiODNl MTkgMTAwNjQ0DQotLS0gYS9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210Nzkx NS9pbml0LmMNCisrKyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1 L2luaXQuYw0KQEAgLTg1LDYgKzg1LDggQEAgc3RhdGljIHZvaWQgbXQ3OTE1X2luaXRfdHhwb3dl cihzdHJ1Y3QgbXQ3OTE1X2RldiAqZGV2KQ0KIHsNCiAJbXQ3OTE1X2luaXRfdHhwb3dlcl9iYW5k KGRldiwgJmRldi0+bXBoeS5zYmFuZF8yZy5zYmFuZCk7DQogCW10NzkxNV9pbml0X3R4cG93ZXJf YmFuZChkZXYsICZkZXYtPm1waHkuc2JhbmRfNWcuc2JhbmQpOw0KKw0KKwltdDc5MTVfZWVwcm9t X2luaXRfc2t1KGRldik7DQogfQ0KIA0KIHN0YXRpYyB2b2lkIG10NzkxNV9pbml0X3dvcmsoc3Ry dWN0IHdvcmtfc3RydWN0ICp3b3JrKQ0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvbmV0L3dpcmVsZXNz L21lZGlhdGVrL210NzYvbXQ3OTE1L21haW4uYyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlh dGVrL210NzYvbXQ3OTE1L21haW4uYw0KaW5kZXggZTllOWU3ZTIxMzg4Li43YmY5OWUxNDhkMDIg MTAwNjQ0DQotLS0gYS9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS9t YWluLmMNCisrKyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L21h aW4uYw0KQEAgLTQyLDYgKzQyLDcgQEAgc3RhdGljIGludCBtdDc5MTVfc3RhcnQoc3RydWN0IGll ZWU4MDIxMV9odyAqaHcpDQogCQltdDc5MTVfbWN1X3NldF9zY3MoZGV2LCAxLCB0cnVlKTsNCiAJ fQ0KIA0KKwltdDc5MTVfbWN1X3NldF9za3VfZW4ocGh5LCB0cnVlKTsNCiAJbXQ3OTE1X21jdV9z ZXRfY2hhbl9pbmZvKHBoeSwgTUNVX0VYVF9DTURfU0VUX1JYX1BBVEgpOw0KIA0KIAlzZXRfYml0 KE1UNzZfU1RBVEVfUlVOTklORywgJnBoeS0+bXQ3Ni0+c3RhdGUpOw0KQEAgLTMyNyw2ICszMjgs MTIgQEAgc3RhdGljIGludCBtdDc5MTVfY29uZmlnKHN0cnVjdCBpZWVlODAyMTFfaHcgKmh3LCB1 MzIgY2hhbmdlZCkNCiAJCWllZWU4MDIxMV93YWtlX3F1ZXVlcyhodyk7DQogCX0NCiANCisJaWYg KGNoYW5nZWQgJiBJRUVFODAyMTFfQ09ORl9DSEFOR0VfUE9XRVIpIHsNCisJCXJldCA9IG10Nzkx NV9tY3Vfc2V0X3NrdShwaHkpOw0KKwkJaWYgKHJldCkNCisJCQlyZXR1cm4gcmV0Ow0KKwl9DQor DQogCW11dGV4X2xvY2soJmRldi0+bXQ3Ni5tdXRleCk7DQogDQogCWlmIChjaGFuZ2VkICYgSUVF RTgwMjExX0NPTkZfQ0hBTkdFX01PTklUT1IpIHsNCmRpZmYgLS1naXQgYS9kcml2ZXJzL25ldC93 aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS9tY3UuYyBiL2RyaXZlcnMvbmV0L3dpcmVsZXNz L21lZGlhdGVrL210NzYvbXQ3OTE1L21jdS5jDQppbmRleCA1Y2E2YmQ5ZjA5OWMuLjU5Y2Q1MGRi MmVjZiAxMDA2NDQNCi0tLSBhL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3 OTE1L21jdS5jDQorKysgYi9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210Nzkx NS9tY3UuYw0KQEAgLTIzMDEsNiArMjMwMSw1NSBAQCBpbnQgbXQ3OTE1X21jdV9nZXRfcmF0ZV9p bmZvKHN0cnVjdCBtdDc5MTVfZGV2ICpkZXYsIHUzMiBjbWQsIHUxNiB3bGFuX2lkeCkNCiAJCQkJ ICAgc2l6ZW9mKHJlcSksIGZhbHNlKTsNCiB9DQogDQoraW50IG10NzkxNV9tY3Vfc2V0X3NrdShz dHJ1Y3QgbXQ3OTE1X3BoeSAqcGh5KQ0KK3sNCisJc3RydWN0IG10NzkxNV9kZXYgKmRldiA9IHBo eS0+ZGV2Ow0KKwlzdHJ1Y3QgbXQ3Nl9waHkgKm1waHkgPSBwaHktPm10NzY7DQorCXN0cnVjdCBp ZWVlODAyMTFfaHcgKmh3ID0gbXBoeS0+aHc7DQorCXN0cnVjdCBtdDc5MTVfc2t1X3ZhbCB7DQor CQl1OCBmb3JtYXRfaWQ7DQorCQl1OCBsaW1pdF90eXBlOw0KKwkJdTggZGJkY19pZHg7DQorCQlz OCB2YWxbTVQ3OTE1X1NLVV9SQVRFX05VTV07DQorCX0gX19wYWNrZWQgcmVxID0gew0KKwkJLmZv cm1hdF9pZCA9IDQsDQorCQkuZGJkY19pZHggPSBwaHkgIT0gJmRldi0+cGh5LA0KKwl9Ow0KKwlp bnQgaTsNCisJczggKmRlbHRhLCBtYXhfcG93ZXI7DQorDQorCWRlbHRhID0gZGV2LT5yYXRlX3Bv d2VyW21waHktPmNoYW5kZWYuY2hhbi0+YmFuZF07DQorDQorCWZvciAoaSA9IDAsIG1heF9wb3dl ciA9IDA7IGkgPCBNVDc5MTVfU0tVX1JBVEVfTlVNOyBpKyspIHsNCisJCXJlcS52YWxbaV0gPSBo dy0+Y29uZi5wb3dlcl9sZXZlbCAqIDIgKyBkZWx0YVtpXTsNCisJCW1heF9wb3dlciA9IG1heCht YXhfcG93ZXIsIHJlcS52YWxbaV0pOw0KKwl9DQorCW1waHktPnR4cG93ZXJfY3VyID0gbWF4X3Bv d2VyOw0KKw0KKwlyZXR1cm4gX19tdDc2X21jdV9zZW5kX21zZygmZGV2LT5tdDc2LA0KKwkJCQkg ICBNQ1VfRVhUX0NNRF9UWF9QT1dFUl9GRUFUVVJFX0NUUkwsDQorCQkJCSAgICZyZXEsIHNpemVv ZihyZXEpLCB0cnVlKTsNCit9DQorDQoraW50IG10NzkxNV9tY3Vfc2V0X3NrdV9lbihzdHJ1Y3Qg bXQ3OTE1X3BoeSAqcGh5LCBib29sIGVuYWJsZSkNCit7DQorCXN0cnVjdCBtdDc5MTVfZGV2ICpk ZXYgPSBwaHktPmRldjsNCisJc3RydWN0IG10NzkxNV9za3Ugew0KKwkJdTggZm9ybWF0X2lkOw0K KwkJdTggc2t1X2VuYWJsZTsNCisJCXU4IGRiZGNfaWR4Ow0KKwkJdTggcnN2Ow0KKwl9IF9fcGFj a2VkIHJlcSA9IHsNCisJCS5mb3JtYXRfaWQgPSAwLA0KKwkJLmRiZGNfaWR4ID0gcGh5ICE9ICZk ZXYtPnBoeSwNCisJCS5za3VfZW5hYmxlID0gZW5hYmxlLA0KKwl9Ow0KKw0KKwlyZXR1cm4gX19t dDc2X21jdV9zZW5kX21zZygmZGV2LT5tdDc2LA0KKwkJCQkgICBNQ1VfRVhUX0NNRF9UWF9QT1dF Ul9GRUFUVVJFX0NUUkwsDQorCQkJCSAgICZyZXEsIHNpemVvZihyZXEpLCB0cnVlKTsNCit9DQor DQogaW50IG10NzkxNV9tY3Vfc2V0X3NlcihzdHJ1Y3QgbXQ3OTE1X2RldiAqZGV2LCB1OCBhY3Rp b24sIHU4IHNldCwgdTggYmFuZCkNCiB7DQogCXN0cnVjdCB7DQpkaWZmIC0tZ2l0IGEvZHJpdmVy cy9uZXQvd2lyZWxlc3MvbWVkaWF0ZWsvbXQ3Ni9tdDc5MTUvbWN1LmggYi9kcml2ZXJzL25ldC93 aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS9tY3UuaA0KaW5kZXggNWU0NzA4ODYxZWRlLi5k OWM5YWFiN2U2ZGMgMTAwNjQ0DQotLS0gYS9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9t dDc2L210NzkxNS9tY3UuaA0KKysrIGIvZHJpdmVycy9uZXQvd2lyZWxlc3MvbWVkaWF0ZWsvbXQ3 Ni9tdDc5MTUvbWN1LmgNCkBAIC0yMDMsNiArMjAzLDcgQEAgZW51bSB7DQogCU1DVV9FWFRfQ01E X01BQ19JTklUX0NUUkwgPSAweDQ2LA0KIAlNQ1VfRVhUX0NNRF9SWF9IRFJfVFJBTlMgPSAweDQ3 LA0KIAlNQ1VfRVhUX0NNRF9TRVRfUlhfUEFUSCA9IDB4NGUsDQorCU1DVV9FWFRfQ01EX1RYX1BP V0VSX0ZFQVRVUkVfQ1RSTCA9IDB4NTgsDQogCU1DVV9FWFRfQ01EX1NFVF9TRVJfVFJJR0dFUiA9 IDB4ODEsDQogCU1DVV9FWFRfQ01EX1NDU19DVFJMID0gMHg4MiwNCiAJTUNVX0VYVF9DTURfUkFU RV9DVFJMID0gMHg4NywNCmRpZmYgLS1naXQgYS9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRl ay9tdDc2L210NzkxNS9tdDc5MTUuaCBiL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210 NzYvbXQ3OTE1L210NzkxNS5oDQppbmRleCBmMjEzOWE1MjQ4ZDkuLmI1MDJiY2M5ODVlYyAxMDA2 NDQNCi0tLSBhL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L210Nzkx NS5oDQorKysgYi9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS9tdDc5 MTUuaA0KQEAgLTM4LDYgKzM4LDcgQEANCiAjZGVmaW5lIE1UNzkxNV81R19SQVRFX0RFRkFVTFQJ CTB4NGIJLyogT0ZETSA2TSAqLw0KICNkZWZpbmUgTVQ3OTE1XzJHX1JBVEVfREVGQVVMVAkJMHgw CS8qIENDSyAxTSAqLw0KIA0KKyNkZWZpbmUgTVQ3OTE1X1NLVV9SQVRFX05VTQkJMTYxDQogDQog c3RydWN0IG10NzkxNV92aWY7DQogc3RydWN0IG10NzkxNV9zdGE7DQpAQCAtMTYyLDYgKzE2Myw4 IEBAIHN0cnVjdCBtdDc5MTVfZGV2IHsNCiAJc3BpbmxvY2tfdCB0b2tlbl9sb2NrOw0KIAlzdHJ1 Y3QgaWRyIHRva2VuOw0KIA0KKwlzOCAqKnJhdGVfcG93ZXI7IC8qIFRPRE86IHVzZSBtdDc2X3Jh dGVfcG93ZXIgKi8NCisNCiAJdTggbWFjX3dvcmtfY291bnQ7DQogCWJvb2wgZndfZGVidWc7DQog fTsNCkBAIC0yNjksNiArMjcyLDcgQEAgdTMyIG10NzkxNV9lZXByb21fcmVhZChzdHJ1Y3QgbXQ3 OTE1X2RldiAqZGV2LCB1MzIgb2Zmc2V0KTsNCiBpbnQgbXQ3OTE1X2VlcHJvbV9nZXRfdGFyZ2V0 X3Bvd2VyKHN0cnVjdCBtdDc5MTVfZGV2ICpkZXYsDQogCQkJCSAgIHN0cnVjdCBpZWVlODAyMTFf Y2hhbm5lbCAqY2hhbiwNCiAJCQkJICAgdTggY2hhaW5faWR4KTsNCit2b2lkIG10NzkxNV9lZXBy b21faW5pdF9za3Uoc3RydWN0IG10NzkxNV9kZXYgKmRldik7DQogaW50IG10NzkxNV9kbWFfaW5p dChzdHJ1Y3QgbXQ3OTE1X2RldiAqZGV2KTsNCiB2b2lkIG10NzkxNV9kbWFfcHJlZmV0Y2goc3Ry dWN0IG10NzkxNV9kZXYgKmRldik7DQogdm9pZCBtdDc5MTVfZG1hX2NsZWFudXAoc3RydWN0IG10 NzkxNV9kZXYgKmRldik7DQpAQCAtMzA0LDYgKzMwOCw4IEBAIGludCBtdDc5MTVfbWN1X3NldF9z Y3Moc3RydWN0IG10NzkxNV9kZXYgKmRldiwgdTggYmFuZCwgYm9vbCBlbmFibGUpOw0KIGludCBt dDc5MTVfbWN1X3NldF9zZXIoc3RydWN0IG10NzkxNV9kZXYgKmRldiwgdTggYWN0aW9uLCB1OCBz ZXQsIHU4IGJhbmQpOw0KIGludCBtdDc5MTVfbWN1X3NldF9ydHNfdGhyZXNoKHN0cnVjdCBtdDc5 MTVfcGh5ICpwaHksIHUzMiB2YWwpOw0KIGludCBtdDc5MTVfbWN1X3NldF9wbShzdHJ1Y3QgbXQ3 OTE1X2RldiAqZGV2LCBpbnQgYmFuZCwgaW50IGVudGVyKTsNCitpbnQgbXQ3OTE1X21jdV9zZXRf c2t1X2VuKHN0cnVjdCBtdDc5MTVfcGh5ICpwaHksIGJvb2wgZW5hYmxlKTsNCitpbnQgbXQ3OTE1 X21jdV9zZXRfc2t1KHN0cnVjdCBtdDc5MTVfcGh5ICpwaHkpOw0KIGludCBtdDc5MTVfbWN1X3Nl dF9mY2M1X2xwbihzdHJ1Y3QgbXQ3OTE1X2RldiAqZGV2LCBpbnQgdmFsKTsNCiBpbnQgbXQ3OTE1 X21jdV9zZXRfcHVsc2VfdGgoc3RydWN0IG10NzkxNV9kZXYgKmRldiwNCiAJCQkgICAgY29uc3Qg c3RydWN0IG10NzkxNV9kZnNfcHVsc2UgKnB1bHNlKTsNCmRpZmYgLS1naXQgYS9kcml2ZXJzL25l dC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210NzkxNS9wY2kuYyBiL2RyaXZlcnMvbmV0L3dpcmVs ZXNzL21lZGlhdGVrL210NzYvbXQ3OTE1L3BjaS5jDQppbmRleCAxMmE1NjJkM2FhM2QuLmQzNDk1 NjFlNDU5OCAxMDA2NDQNCi0tLSBhL2RyaXZlcnMvbmV0L3dpcmVsZXNzL21lZGlhdGVrL210NzYv bXQ3OTE1L3BjaS5jDQorKysgYi9kcml2ZXJzL25ldC93aXJlbGVzcy9tZWRpYXRlay9tdDc2L210 NzkxNS9wY2kuYw0KQEAgLTc0LDYgKzc0LDI5IEBAIHN0YXRpYyBpcnFyZXR1cm5fdCBtdDc5MTVf aXJxX2hhbmRsZXIoaW50IGlycSwgdm9pZCAqZGV2X2luc3RhbmNlKQ0KIAlyZXR1cm4gSVJRX0hB TkRMRUQ7DQogfQ0KIA0KK3N0YXRpYyBpbnQNCittdDc5MTVfYWxsb2NfZGV2aWNlKHN0cnVjdCBw Y2lfZGV2ICpwZGV2LCBzdHJ1Y3QgbXQ3OTE1X2RldiAqZGV2KQ0KK3sNCisjZGVmaW5lIE5VTV9C QU5EUwkyDQorCWludCBpOw0KKwlzOCAqKnNrdTsNCisNCisJc2t1ID0gZGV2bV9remFsbG9jKCZw ZGV2LT5kZXYsIE5VTV9CQU5EUyAqIHNpemVvZigqc2t1KSwgR0ZQX0tFUk5FTCk7DQorCWlmICgh c2t1KQ0KKwkJcmV0dXJuIC1FTk9NRU07DQorDQorCWZvciAoaSA9IDA7IGkgPCBOVU1fQkFORFM7 IGkrKykgew0KKwkJc2t1W2ldID0gZGV2bV9remFsbG9jKCZwZGV2LT5kZXYsIE1UNzkxNV9TS1Vf UkFURV9OVU0gKg0KKwkJCQkgICAgICBzaXplb2YoKipza3UpLCBHRlBfS0VSTkVMKTsNCisJCWlm ICghc2t1W2ldKQ0KKwkJCXJldHVybiAtRU5PTUVNOw0KKwl9DQorCWRldi0+cmF0ZV9wb3dlciA9 IHNrdTsNCisNCisNCisJcmV0dXJuIDA7DQorfQ0KKw0KIHN0YXRpYyBpbnQgbXQ3OTE1X3BjaV9w cm9iZShzdHJ1Y3QgcGNpX2RldiAqcGRldiwNCiAJCQkgICAgY29uc3Qgc3RydWN0IHBjaV9kZXZp Y2VfaWQgKmlkKQ0KIHsNCkBAIC0xMTcsNiArMTQwLDkgQEAgc3RhdGljIGludCBtdDc5MTVfcGNp X3Byb2JlKHN0cnVjdCBwY2lfZGV2ICpwZGV2LA0KIAkJcmV0dXJuIC1FTk9NRU07DQogDQogCWRl diA9IGNvbnRhaW5lcl9vZihtZGV2LCBzdHJ1Y3QgbXQ3OTE1X2RldiwgbXQ3Nik7DQorCXJldCA9 IG10NzkxNV9hbGxvY19kZXZpY2UocGRldiwgZGV2KTsNCisJaWYgKHJldCkNCisJCXJldHVybiBy ZXQ7DQogDQogCW10NzZfbW1pb19pbml0KCZkZXYtPm10NzYsIHBjaW1faW9tYXBfdGFibGUocGRl dilbMF0pOw0KIAltZGV2LT5yZXYgPSAobXQ3OTE1X2wxX3JyKGRldiwgTVRfSFdfQ0hJUElEKSA8 PCAxNikgfA0KLS0gDQoyLjE4LjANCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94E13C2BB55 for ; Fri, 10 Apr 2020 09:05:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6272C206F7 for ; Fri, 10 Apr 2020 09:05:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="aX55UyCh"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Hg9pZads" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6272C206F7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zQ5r87f8IkRosFcC6QziwnxxjCTG02ocnh8Zjoa+HeE=; b=aX55UyCh+vTzY3 nLXr4swNIStX/XaV596SywftjtaZeAWF8vzxFA6ldLYuNjjLJsS9oPevNSjRi99iaTLFEtjN/5TyG N2UoA6xloUR7zxpvygNhMPhm0B3nQRG9ZbgE6Q8Syt1fNRcBJtIH56rjjif30bMtINMHZBLSuoxKm EE/W13fQiuYUVRmPYklyOUjSbs/ji3F8qqR95ofwGe6/ZRkYIiLqrLxt1zKAA1fcVWfy2NGEcK/0S nCgWNLy+jhKw8ikZY+cpQKFJJ5EF6GIFRYPMTsSlsg/TWoIpjhGtdzuAmGiwKcdolfUmJHGH31nDp 26/Vkrjke5+jocx52fqQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jMpbG-0008AA-Cy; Fri, 10 Apr 2020 09:05:22 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jMpbA-00081a-R5 for linux-mediatek@lists.infradead.org; Fri, 10 Apr 2020 09:05:19 +0000 X-UUID: 1b6b3e6b78eb4aa98cfd54daca3e9d80-20200410 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=lcRSBm2Qn6zLQZp4CLET2NDgyS8tMHUGD+d1o/f5bOM=; b=Hg9pZadsBZy85InfvVcaXKVy+zyCiA2WCO3U4IQ9N2aU+msOHdJ4i79ehuw6LZWKbSNXGQMxZJ47X/TouTu7q1o9ztLD1+eDWpjQmCEW1sQQGRuKf9vIoF8F+yaz/h1+9wMDVouUmL9sdv/zmRb/hbuTeuFrRO+1acMoe4DBfrc=; X-UUID: 1b6b3e6b78eb4aa98cfd54daca3e9d80-20200410 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1718594927; Fri, 10 Apr 2020 01:05:06 -0800 Received: from mtkmbs08n2.mediatek.inc (172.21.101.56) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 10 Apr 2020 01:55:05 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 10 Apr 2020 16:54:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 10 Apr 2020 16:54:57 +0800 From: Ryder Lee To: Felix Fietkau , Lorenzo Bianconi Subject: [PATCH 07/16] mt76: mt7915: implement HE per-rate tx power support Date: Fri, 10 Apr 2020 16:54:44 +0800 Message-ID: <44776fec051db7ef48785046658946eaf553cd18.1586507878.git.ryder.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: MIME-Version: 1.0 X-TM-SNTS-SMTP: E21AE195C7B3B0582B79215EF17D2769D3183252E033B9999B426719721AEC0F2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200410_020516_938508_E5D042E7 X-CRM114-Status: GOOD ( 11.67 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: YF Luo , Evelyn Tsai , linux-wireless@vger.kernel.org, Sean Wang , Chih-Min Chen , Ryder Lee , Yiwei Chung , linux-mediatek@lists.infradead.org, Shayne Chen Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Use firmware support for applying per-rate limit and power offsets. This can support all HE RU types. Signed-off-by: Shayne Chen Signed-off-by: Ryder Lee Tested-by: Chih-Min Chen Tested-by: Evelyn Tsai Acked-by: Yiwei Chung Acked-by: YF Luo --- .../wireless/mediatek/mt76/mt7915/debugfs.c | 56 +++++++++ .../wireless/mediatek/mt76/mt7915/eeprom.c | 111 ++++++++++++++++++ .../wireless/mediatek/mt76/mt7915/eeprom.h | 47 ++++++++ .../net/wireless/mediatek/mt76/mt7915/init.c | 2 + .../net/wireless/mediatek/mt76/mt7915/main.c | 7 ++ .../net/wireless/mediatek/mt76/mt7915/mcu.c | 49 ++++++++ .../net/wireless/mediatek/mt76/mt7915/mcu.h | 1 + .../wireless/mediatek/mt76/mt7915/mt7915.h | 6 + .../net/wireless/mediatek/mt76/mt7915/pci.c | 26 ++++ 9 files changed, 305 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c b/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c index 152ae0617f3d..34df2d8cdb8f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c @@ -219,6 +219,60 @@ mt7915_queues_read(struct seq_file *s, void *data) return 0; } +static void +mt7915_puts_rate_txpower(struct seq_file *s, s8 *delta, + s8 txpower_cur, int band) +{ + static const char * const sku_group_name[] = { + "CCK", "OFDM", "HT20", "HT40", + "VHT20", "VHT40", "VHT80", "VHT160", + "RU26", "RU52", "RU106", "RU242/SU20", + "RU484/SU40", "RU996/SU80", "RU2x996/SU160" + }; + s8 txpower[MT7915_SKU_RATE_NUM]; + int i, idx = 0; + + for (i = 0; i < MT7915_SKU_RATE_NUM; i++) + txpower[i] = txpower_cur + delta[i] / 2; + + for (i = 0; i < MAX_SKU_RATE_GROUP_NUM; i++) { + const struct sku_group *sku = &mt7915_sku_groups[i]; + u32 offset = sku->offset[band]; + + if (!offset) { + idx += sku->len; + continue; + } + + mt76_seq_puts_array(s, sku_group_name[i], + txpower + idx, sku->len); + idx += sku->len; + } +} + +static int +mt7915_read_rate_txpower(struct seq_file *s, void *data) +{ + struct mt7915_dev *dev = dev_get_drvdata(s->private); + struct mt76_phy *mphy = &dev->mphy; + enum nl80211_band band = mphy->chandef.chan->band; + s8 *delta = dev->rate_power[band]; + + seq_puts(s, "Band 0:\n"); + mt7915_puts_rate_txpower(s, delta, mphy->txpower_cur, band); + + if (dev->mt76.phy2) { + mphy = dev->mt76.phy2; + band = mphy->chandef.chan->band; + delta = dev->rate_power[band]; + + seq_puts(s, "Band 1:\n"); + mt7915_puts_rate_txpower(s, delta, mphy->txpower_cur, band); + } + + return 0; +} + int mt7915_init_debugfs(struct mt7915_dev *dev) { struct dentry *dir; @@ -240,6 +294,8 @@ int mt7915_init_debugfs(struct mt7915_dev *dev) debugfs_create_file("ser_trigger", 0200, dir, dev, &fops_ser_trigger); debugfs_create_devm_seqfile(dev->mt76.dev, "temperature", dir, mt7915_read_temperature); + debugfs_create_devm_seqfile(dev->mt76.dev, "txpower_sku", dir, + mt7915_read_rate_txpower); return 0; } diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c index 2099dd40530f..52706968bf6a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c @@ -123,3 +123,114 @@ int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, return mt7915_eeprom_read(dev, index); } + +static const u8 sku_cck_delta_map[] = { + SKU_CCK_GROUP0, + SKU_CCK_GROUP0, + SKU_CCK_GROUP1, + SKU_CCK_GROUP1, +}; + +static const u8 sku_ofdm_delta_map[] = { + SKU_OFDM_GROUP0, + SKU_OFDM_GROUP0, + SKU_OFDM_GROUP1, + SKU_OFDM_GROUP1, + SKU_OFDM_GROUP2, + SKU_OFDM_GROUP2, + SKU_OFDM_GROUP3, + SKU_OFDM_GROUP4, +}; + +static const u8 sku_mcs_delta_map[] = { + SKU_MCS_GROUP0, + SKU_MCS_GROUP1, + SKU_MCS_GROUP1, + SKU_MCS_GROUP2, + SKU_MCS_GROUP2, + SKU_MCS_GROUP3, + SKU_MCS_GROUP4, + SKU_MCS_GROUP5, + SKU_MCS_GROUP6, + SKU_MCS_GROUP7, + SKU_MCS_GROUP8, + SKU_MCS_GROUP9, +}; + +#define SKU_GROUP(_mode, _len, _ofs_2g, _ofs_5g, _map) \ + [_mode] = { \ + .len = _len, \ + .offset = { \ + _ofs_2g, \ + _ofs_5g, \ + }, \ + .delta_map = _map \ +} + +const struct sku_group mt7915_sku_groups[] = { + SKU_GROUP(SKU_CCK, 4, 0x252, 0, sku_cck_delta_map), + SKU_GROUP(SKU_OFDM, 8, 0x254, 0x29d, sku_ofdm_delta_map), + + SKU_GROUP(SKU_HT_BW20, 8, 0x259, 0x2a2, sku_mcs_delta_map), + SKU_GROUP(SKU_HT_BW40, 9, 0x262, 0x2ab, sku_mcs_delta_map), + SKU_GROUP(SKU_VHT_BW20, 12, 0x259, 0x2a2, sku_mcs_delta_map), + SKU_GROUP(SKU_VHT_BW40, 12, 0x262, 0x2ab, sku_mcs_delta_map), + SKU_GROUP(SKU_VHT_BW80, 12, 0, 0x2b4, sku_mcs_delta_map), + SKU_GROUP(SKU_VHT_BW160, 12, 0, 0, sku_mcs_delta_map), + + SKU_GROUP(SKU_HE_RU26, 12, 0x27f, 0x2dd, sku_mcs_delta_map), + SKU_GROUP(SKU_HE_RU52, 12, 0x289, 0x2e7, sku_mcs_delta_map), + SKU_GROUP(SKU_HE_RU106, 12, 0x293, 0x2f1, sku_mcs_delta_map), + SKU_GROUP(SKU_HE_RU242, 12, 0x26b, 0x2bf, sku_mcs_delta_map), + SKU_GROUP(SKU_HE_RU484, 12, 0x275, 0x2c9, sku_mcs_delta_map), + SKU_GROUP(SKU_HE_RU996, 12, 0, 0x2d3, sku_mcs_delta_map), + SKU_GROUP(SKU_HE_RU2x996, 12, 0, 0, sku_mcs_delta_map), +}; + +static s8 +mt7915_get_sku_delta(struct mt7915_dev *dev, u32 addr) +{ + u32 val = mt7915_eeprom_read(dev, addr); + s8 delta = FIELD_GET(SKU_DELTA_VAL, val); + + if (!(val & SKU_DELTA_EN)) + return 0; + + return val & SKU_DELTA_ADD ? delta : -delta; +} + +static void +mt7915_eeprom_init_sku_band(struct mt7915_dev *dev, + struct ieee80211_supported_band *sband) +{ + int i, band = sband->band; + s8 *rate_power = dev->rate_power[band]; + u8 idx = 0; + + for (i = 0; i < ARRAY_SIZE(mt7915_sku_groups); i++) { + const struct sku_group *sku = &mt7915_sku_groups[i]; + u32 offset = sku->offset[band]; + int j; + + if (!offset) { + idx += sku->len; + continue; + } + + rate_power[idx++] = mt7915_get_sku_delta(dev, offset); + if (i == SKU_HT_BW20 || i == SKU_VHT_BW20) + offset += 1; + + for (j = 1; j < sku->len; j++) { + u32 addr = offset + sku->delta_map[j]; + + rate_power[idx++] = mt7915_get_sku_delta(dev, addr); + } + } +} + +void mt7915_eeprom_init_sku(struct mt7915_dev *dev) +{ + mt7915_eeprom_init_sku_band(dev, &dev->mphy.sband_2g.sband); + mt7915_eeprom_init_sku_band(dev, &dev->mphy.sband_5g.sband); +} diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h index 30fc607e466d..4e31d6ab4fa6 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h @@ -37,6 +37,51 @@ enum mt7915_eeprom_band { MT_EE_DBDC, }; +#define SKU_DELTA_VAL GENMASK(5, 0) +#define SKU_DELTA_ADD BIT(6) +#define SKU_DELTA_EN BIT(7) + +enum mt7915_sku_delta_group { + SKU_CCK_GROUP0, + SKU_CCK_GROUP1, + + SKU_OFDM_GROUP0 = 0, + SKU_OFDM_GROUP1, + SKU_OFDM_GROUP2, + SKU_OFDM_GROUP3, + SKU_OFDM_GROUP4, + + SKU_MCS_GROUP0 = 0, + SKU_MCS_GROUP1, + SKU_MCS_GROUP2, + SKU_MCS_GROUP3, + SKU_MCS_GROUP4, + SKU_MCS_GROUP5, + SKU_MCS_GROUP6, + SKU_MCS_GROUP7, + SKU_MCS_GROUP8, + SKU_MCS_GROUP9, +}; + +enum mt7915_sku_rate_group { + SKU_CCK, + SKU_OFDM, + SKU_HT_BW20, + SKU_HT_BW40, + SKU_VHT_BW20, + SKU_VHT_BW40, + SKU_VHT_BW80, + SKU_VHT_BW160, + SKU_HE_RU26, + SKU_HE_RU52, + SKU_HE_RU106, + SKU_HE_RU242, + SKU_HE_RU484, + SKU_HE_RU996, + SKU_HE_RU2x996, + MAX_SKU_RATE_GROUP_NUM, +}; + struct sku_group { u8 len; u16 offset[2]; @@ -75,4 +120,6 @@ mt7915_tssi_enabled(struct mt7915_dev *dev, enum nl80211_band band) return eep[MT_EE_WIFI_CONF + 7] & MT_EE_WIFI_CONF_TSSI0_2G; } +extern const struct sku_group mt7915_sku_groups[]; + #endif diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/init.c b/drivers/net/wireless/mediatek/mt76/mt7915/init.c index 0e3e6b1547b3..cba9dfb83e19 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c @@ -85,6 +85,8 @@ static void mt7915_init_txpower(struct mt7915_dev *dev) { mt7915_init_txpower_band(dev, &dev->mphy.sband_2g.sband); mt7915_init_txpower_band(dev, &dev->mphy.sband_5g.sband); + + mt7915_eeprom_init_sku(dev); } static void mt7915_init_work(struct work_struct *work) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/main.c b/drivers/net/wireless/mediatek/mt76/mt7915/main.c index e9e9e7e21388..7bf99e148d02 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/main.c @@ -42,6 +42,7 @@ static int mt7915_start(struct ieee80211_hw *hw) mt7915_mcu_set_scs(dev, 1, true); } + mt7915_mcu_set_sku_en(phy, true); mt7915_mcu_set_chan_info(phy, MCU_EXT_CMD_SET_RX_PATH); set_bit(MT76_STATE_RUNNING, &phy->mt76->state); @@ -327,6 +328,12 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed) ieee80211_wake_queues(hw); } + if (changed & IEEE80211_CONF_CHANGE_POWER) { + ret = mt7915_mcu_set_sku(phy); + if (ret) + return ret; + } + mutex_lock(&dev->mt76.mutex); if (changed & IEEE80211_CONF_CHANGE_MONITOR) { diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c index 5ca6bd9f099c..59cd50db2ecf 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c @@ -2301,6 +2301,55 @@ int mt7915_mcu_get_rate_info(struct mt7915_dev *dev, u32 cmd, u16 wlan_idx) sizeof(req), false); } +int mt7915_mcu_set_sku(struct mt7915_phy *phy) +{ + struct mt7915_dev *dev = phy->dev; + struct mt76_phy *mphy = phy->mt76; + struct ieee80211_hw *hw = mphy->hw; + struct mt7915_sku_val { + u8 format_id; + u8 limit_type; + u8 dbdc_idx; + s8 val[MT7915_SKU_RATE_NUM]; + } __packed req = { + .format_id = 4, + .dbdc_idx = phy != &dev->phy, + }; + int i; + s8 *delta, max_power; + + delta = dev->rate_power[mphy->chandef.chan->band]; + + for (i = 0, max_power = 0; i < MT7915_SKU_RATE_NUM; i++) { + req.val[i] = hw->conf.power_level * 2 + delta[i]; + max_power = max(max_power, req.val[i]); + } + mphy->txpower_cur = max_power; + + return __mt76_mcu_send_msg(&dev->mt76, + MCU_EXT_CMD_TX_POWER_FEATURE_CTRL, + &req, sizeof(req), true); +} + +int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable) +{ + struct mt7915_dev *dev = phy->dev; + struct mt7915_sku { + u8 format_id; + u8 sku_enable; + u8 dbdc_idx; + u8 rsv; + } __packed req = { + .format_id = 0, + .dbdc_idx = phy != &dev->phy, + .sku_enable = enable, + }; + + return __mt76_mcu_send_msg(&dev->mt76, + MCU_EXT_CMD_TX_POWER_FEATURE_CTRL, + &req, sizeof(req), true); +} + int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band) { struct { diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h index 5e4708861ede..d9c9aab7e6dc 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h @@ -203,6 +203,7 @@ enum { MCU_EXT_CMD_MAC_INIT_CTRL = 0x46, MCU_EXT_CMD_RX_HDR_TRANS = 0x47, MCU_EXT_CMD_SET_RX_PATH = 0x4e, + MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, MCU_EXT_CMD_SCS_CTRL = 0x82, MCU_EXT_CMD_RATE_CTRL = 0x87, diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h index f2139a5248d9..b502bcc985ec 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h @@ -38,6 +38,7 @@ #define MT7915_5G_RATE_DEFAULT 0x4b /* OFDM 6M */ #define MT7915_2G_RATE_DEFAULT 0x0 /* CCK 1M */ +#define MT7915_SKU_RATE_NUM 161 struct mt7915_vif; struct mt7915_sta; @@ -162,6 +163,8 @@ struct mt7915_dev { spinlock_t token_lock; struct idr token; + s8 **rate_power; /* TODO: use mt76_rate_power */ + u8 mac_work_count; bool fw_debug; }; @@ -269,6 +272,7 @@ u32 mt7915_eeprom_read(struct mt7915_dev *dev, u32 offset); int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, struct ieee80211_channel *chan, u8 chain_idx); +void mt7915_eeprom_init_sku(struct mt7915_dev *dev); int mt7915_dma_init(struct mt7915_dev *dev); void mt7915_dma_prefetch(struct mt7915_dev *dev); void mt7915_dma_cleanup(struct mt7915_dev *dev); @@ -304,6 +308,8 @@ int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable); int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val); int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter); +int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); +int mt7915_mcu_set_sku(struct mt7915_phy *phy); int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val); int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, const struct mt7915_dfs_pulse *pulse); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/pci.c b/drivers/net/wireless/mediatek/mt76/mt7915/pci.c index 12a562d3aa3d..d349561e4598 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/pci.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/pci.c @@ -74,6 +74,29 @@ static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance) return IRQ_HANDLED; } +static int +mt7915_alloc_device(struct pci_dev *pdev, struct mt7915_dev *dev) +{ +#define NUM_BANDS 2 + int i; + s8 **sku; + + sku = devm_kzalloc(&pdev->dev, NUM_BANDS * sizeof(*sku), GFP_KERNEL); + if (!sku) + return -ENOMEM; + + for (i = 0; i < NUM_BANDS; i++) { + sku[i] = devm_kzalloc(&pdev->dev, MT7915_SKU_RATE_NUM * + sizeof(**sku), GFP_KERNEL); + if (!sku[i]) + return -ENOMEM; + } + dev->rate_power = sku; + + + return 0; +} + static int mt7915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { @@ -117,6 +140,9 @@ static int mt7915_pci_probe(struct pci_dev *pdev, return -ENOMEM; dev = container_of(mdev, struct mt7915_dev, mt76); + ret = mt7915_alloc_device(pdev, dev); + if (ret) + return ret; mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); mdev->rev = (mt7915_l1_rr(dev, MT_HW_CHIPID) << 16) | -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek