From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8B30C433EF for ; Fri, 13 May 2022 06:49:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377443AbiEMGs7 (ORCPT ); Fri, 13 May 2022 02:48:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359479AbiEMGs4 (ORCPT ); Fri, 13 May 2022 02:48:56 -0400 Received: from maillog.nuvoton.com (maillog.nuvoton.com [202.39.227.15]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0961C18A696; Thu, 12 May 2022 23:48:54 -0700 (PDT) Received: from NTHCCAS04.nuvoton.com (NTHCCAS04.nuvoton.com [10.1.8.29]) by maillog.nuvoton.com (Postfix) with ESMTP id 406721C80DD3; Fri, 13 May 2022 14:48:54 +0800 (CST) Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS04.nuvoton.com (10.1.8.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 13 May 2022 14:48:53 +0800 Received: from [172.19.1.47] (172.19.1.47) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Fri, 13 May 2022 14:48:53 +0800 Message-ID: <46a55b01-ee9f-604f-72c9-916bc2f02a09@nuvoton.com> Date: Fri, 13 May 2022 14:48:54 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH V4 3/5] arm64: dts: nuvoton: Add initial support for MA35D1 Content-Language: en-US To: Krzysztof Kozlowski , , , , , CC: , , , , , , , , References: <20220510032558.10304-1-ychuang3@nuvoton.com> <20220510032558.10304-4-ychuang3@nuvoton.com> <03ac0a67-bd1f-12ca-74f7-8d5b05857ea7@linaro.org> From: Jacky Huang In-Reply-To: <03ac0a67-bd1f-12ca-74f7-8d5b05857ea7@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/5/12 下午 10:10, Krzysztof Kozlowski wrote: > On 10/05/2022 05:25, Jacky Huang wrote: >> Add the initial device tree files for Nuvoton MA35D1 Soc. >> >> Signed-off-by: Jacky Huang >> --- >> arch/arm64/boot/dts/Makefile | 1 + >> arch/arm64/boot/dts/nuvoton/Makefile | 2 + >> arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts | 24 +++++ >> arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 120 +++++++++++++++++++++ >> 4 files changed, 147 insertions(+) >> create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile >> create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts >> create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi >> >> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile >> index 1ba04e31a438..7b107fa7414b 100644 >> --- a/arch/arm64/boot/dts/Makefile >> +++ b/arch/arm64/boot/dts/Makefile >> @@ -19,6 +19,7 @@ subdir-y += lg >> subdir-y += marvell >> subdir-y += mediatek >> subdir-y += microchip >> +subdir-y += nuvoton >> subdir-y += nvidia >> subdir-y += qcom >> subdir-y += realtek >> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile >> new file mode 100644 >> index 000000000000..e1e0c466bf5e >> --- /dev/null >> +++ b/arch/arm64/boot/dts/nuvoton/Makefile >> @@ -0,0 +1,2 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb >> diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts >> new file mode 100644 >> index 000000000000..95f0facb0476 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts >> @@ -0,0 +1,24 @@ >> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +/* >> + * Device Tree Source for MA35D1 Evaluation Board (EVB) >> + * >> + * Copyright (C) 2022 Nuvoton Technology Corp. >> + */ >> + >> +/dts-v1/; >> +#include "ma35d1.dtsi" >> + >> +/ { >> + model = "Nuvoton MA35D1-EVB"; >> + compatible = "nuvoton,ma35d1-evb", "nuvoton,ma35d1"; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> + >> + memory@80000000 { >> + device_type = "memory"; >> + reg = <0x0 0x80000000 0x0 0x10000000>; >> + }; >> +}; >> + > > .git/rebase-apply/patch:60: new blank line at EOF. > > + > > warning: 1 line adds whitespace errors. > I will fix it. > >> diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi >> new file mode 100644 >> index 000000000000..7212f8de6906 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi >> @@ -0,0 +1,120 @@ >> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +/* >> + * Copyright (c) 2022 Nuvoton Technology Corp. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +/ { >> + compatible = "nuvoton,ma35d1"; >> + interrupt-parent = <&gic>; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + cpus { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + cpu-map { >> + cluster0 { >> + core0 { >> + cpu = <&cpu0>; >> + }; >> + core1 { >> + cpu = <&cpu1>; >> + }; >> + }; >> + }; >> + >> + cpu0: cpu@0 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a35"; >> + reg = <0x0>; >> + enable-method = "psci"; >> + next-level-cache = <&L2_0>; >> + }; >> + >> + cpu1: cpu@1 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a35"; >> + reg = <0x1>; >> + enable-method = "psci"; >> + next-level-cache = <&L2_0>; >> + }; >> + >> + L2_0: l2-cache0 { >> + compatible = "cache"; >> + cache-level = <2>; >> + }; >> + }; >> + >> + psci { >> + compatible = "arm,psci-0.2"; >> + method = "smc"; >> + }; >> + >> + hxt_24m: hxt_24mhz { > No underscores in node name. Generic node names, so "clock-X" or > "clock-some-suffix" OK, I will modify it as  hxt-24m: hxt-24mhz >> + compatible = "fixed-clock"; >> + #clock-cells = <0>; >> + clock-frequency = <24000000>; > This does not look like property of SoC. Where is this clock defined? In > the SoC or on the board? It's an external crystal on the board. I add this node, because it's the clock source of clock controller. It always present on all ma35d1 boards.     clk: clock-controller@40460200 {         compatible = "nuvoton,ma35d1-clk";         reg = <0x0 0x40460200 0x0 0x100>;         #clock-cells = <1>;         clocks = <&hxt_24m>;         clock-names = "HXT_24MHz"; ... >> + clock-output-names = "HXT_24MHz"; >> + }; >> + >> + timer { >> + compatible = "arm,armv8-timer"; >> + interrupts = > + IRQ_TYPE_LEVEL_LOW)>, >> + > + IRQ_TYPE_LEVEL_LOW)>, >> + > + IRQ_TYPE_LEVEL_LOW)>, >> + > + IRQ_TYPE_LEVEL_LOW)>; >> + clock-frequency = <12000000>; >> + }; >> + >> + sys: system-controller@40460000 { >> + compatible = "nuvoton,ma35d1-sys", "syscon", "simple-mfd"; > Why is this a simple-mfd if there are no children here? What do you want > to instantiate here? It's not a device, but a set of registers for system level control. I want to provide a register base mapping for other devices to access system control registers. > Where is the nuvoton,ma35d1-sys compatible documented? OK, I will add the compatible document in next version. >> + reg = <0x0 0x40460000 0x0 0x400>; >> + }; >> + >> + reset: reset-controller { >> + compatible = "nuvoton,ma35d1-reset"; > Also not documented. I will also add the document for it. > >> + nuvoton,ma35d1-sys = <&sys>; >> + #reset-cells = <1>; >> + }; >> + >> + clk: clock-controller@40460200 { >> + compatible = "nuvoton,ma35d1-clk"; >> + reg = <0x0 0x40460200 0x0 0x100>; >> + #clock-cells = <1>; >> + clocks = <&hxt_24m>; >> + clock-names = "HXT_24MHz"; > Please test your DTS with make dtbs_check. > > Don't send DTS which does not pass the checks. It is unnecessary use of > reviewers time when the same job can be done by automated tools. > > Best regards, > Krzysztof Yes, I read the "writing-schema.rst" and know how to do now. Thank you. Sincerely, Jacky Huang From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EED9DC433F5 for ; Fri, 13 May 2022 06:50:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:CC:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WogOom4DMxeNlQOWYYfxuH4dU5sKYVz+UDwF1vi8QVE=; b=pIIe3GhOFypHCl GR8q8/PyZBs+3OdE/aoIwmPSxq/4tznv+L1NQI+NW6/UlLQL88JkczTzbVI8EmpqFupczjeogJD17 GUsX+s1ohRPeOTu50ghoRhSts6PQWbV24lxkxwGjNiUvN3IwbwYjjKHYk0WJGkWRkrlSwBEaGNEEk kzCMOUDG7RFwT1ZR61v6qsW6Q2Drbps2zsj3wnInrD6E05DOonwt/0jzGAt8CH0jtzah2SQtScn7l RYhoWy7rQRDWdCxKmETYPWzYXD9ulUOnAlqzoDYa60DbSIG9XF5s0wmG0XSi8IxUTKPyRzF5JRiEB SSYC+dP3nGrA6GlbfTYg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npP6h-00EjBJ-Et; Fri, 13 May 2022 06:48:59 +0000 Received: from maillog.nuvoton.com ([202.39.227.15]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npP6d-00EjAk-JM for linux-arm-kernel@lists.infradead.org; Fri, 13 May 2022 06:48:57 +0000 Received: from NTHCCAS04.nuvoton.com (NTHCCAS04.nuvoton.com [10.1.8.29]) by maillog.nuvoton.com (Postfix) with ESMTP id 406721C80DD3; Fri, 13 May 2022 14:48:54 +0800 (CST) Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS04.nuvoton.com (10.1.8.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 13 May 2022 14:48:53 +0800 Received: from [172.19.1.47] (172.19.1.47) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Fri, 13 May 2022 14:48:53 +0800 Message-ID: <46a55b01-ee9f-604f-72c9-916bc2f02a09@nuvoton.com> Date: Fri, 13 May 2022 14:48:54 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH V4 3/5] arm64: dts: nuvoton: Add initial support for MA35D1 Content-Language: en-US To: Krzysztof Kozlowski , , , , , CC: , , , , , , , , References: <20220510032558.10304-1-ychuang3@nuvoton.com> <20220510032558.10304-4-ychuang3@nuvoton.com> <03ac0a67-bd1f-12ca-74f7-8d5b05857ea7@linaro.org> From: Jacky Huang In-Reply-To: <03ac0a67-bd1f-12ca-74f7-8d5b05857ea7@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220512_234855_950967_A69308D5 X-CRM114-Status: GOOD ( 24.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CgpPbiAyMDIyLzUvMTIg5LiL5Y2IIDEwOjEwLCBLcnp5c3p0b2YgS296bG93c2tpIHdyb3RlOgo+ IE9uIDEwLzA1LzIwMjIgMDU6MjUsIEphY2t5IEh1YW5nIHdyb3RlOgo+PiBBZGQgdGhlIGluaXRp YWwgZGV2aWNlIHRyZWUgZmlsZXMgZm9yIE51dm90b24gTUEzNUQxIFNvYy4KPj4KPj4gU2lnbmVk LW9mZi1ieTogSmFja3kgSHVhbmcgPHljaHVhbmczQG51dm90b24uY29tPgo+PiAtLS0KPj4gICBh cmNoL2FybTY0L2Jvb3QvZHRzL01ha2VmaWxlICAgICAgICAgICAgICAgfCAgIDEgKwo+PiAgIGFy Y2gvYXJtNjQvYm9vdC9kdHMvbnV2b3Rvbi9NYWtlZmlsZSAgICAgICB8ICAgMiArCj4+ICAgYXJj aC9hcm02NC9ib290L2R0cy9udXZvdG9uL21hMzVkMS1ldmIuZHRzIHwgIDI0ICsrKysrCj4+ICAg YXJjaC9hcm02NC9ib290L2R0cy9udXZvdG9uL21hMzVkMS5kdHNpICAgIHwgMTIwICsrKysrKysr KysrKysrKysrKysrKwo+PiAgIDQgZmlsZXMgY2hhbmdlZCwgMTQ3IGluc2VydGlvbnMoKykKPj4g ICBjcmVhdGUgbW9kZSAxMDA2NDQgYXJjaC9hcm02NC9ib290L2R0cy9udXZvdG9uL01ha2VmaWxl Cj4+ICAgY3JlYXRlIG1vZGUgMTAwNjQ0IGFyY2gvYXJtNjQvYm9vdC9kdHMvbnV2b3Rvbi9tYTM1 ZDEtZXZiLmR0cwo+PiAgIGNyZWF0ZSBtb2RlIDEwMDY0NCBhcmNoL2FybTY0L2Jvb3QvZHRzL251 dm90b24vbWEzNWQxLmR0c2kKPj4KPj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvYm9vdC9kdHMv TWFrZWZpbGUgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL01ha2VmaWxlCj4+IGluZGV4IDFiYTA0ZTMx YTQzOC4uN2IxMDdmYTc0MTRiIDEwMDY0NAo+PiAtLS0gYS9hcmNoL2FybTY0L2Jvb3QvZHRzL01h a2VmaWxlCj4+ICsrKyBiL2FyY2gvYXJtNjQvYm9vdC9kdHMvTWFrZWZpbGUKPj4gQEAgLTE5LDYg KzE5LDcgQEAgc3ViZGlyLXkgKz0gbGcKPj4gICBzdWJkaXIteSArPSBtYXJ2ZWxsCj4+ICAgc3Vi ZGlyLXkgKz0gbWVkaWF0ZWsKPj4gICBzdWJkaXIteSArPSBtaWNyb2NoaXAKPj4gK3N1YmRpci15 ICs9IG51dm90b24KPj4gICBzdWJkaXIteSArPSBudmlkaWEKPj4gICBzdWJkaXIteSArPSBxY29t Cj4+ICAgc3ViZGlyLXkgKz0gcmVhbHRlawo+PiBkaWZmIC0tZ2l0IGEvYXJjaC9hcm02NC9ib290 L2R0cy9udXZvdG9uL01ha2VmaWxlIGIvYXJjaC9hcm02NC9ib290L2R0cy9udXZvdG9uL01ha2Vm aWxlCj4+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4+IGluZGV4IDAwMDAwMDAwMDAwMC4uZTFlMGM0 NjZiZjVlCj4+IC0tLSAvZGV2L251bGwKPj4gKysrIGIvYXJjaC9hcm02NC9ib290L2R0cy9udXZv dG9uL01ha2VmaWxlCj4+IEBAIC0wLDAgKzEsMiBAQAo+PiArIyBTUERYLUxpY2Vuc2UtSWRlbnRp ZmllcjogR1BMLTIuMAo+PiArZHRiLSQoQ09ORklHX0FSQ0hfTlVWT1RPTikgKz0gbWEzNWQxLWV2 Yi5kdGIKPj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvYm9vdC9kdHMvbnV2b3Rvbi9tYTM1ZDEt ZXZiLmR0cyBiL2FyY2gvYXJtNjQvYm9vdC9kdHMvbnV2b3Rvbi9tYTM1ZDEtZXZiLmR0cwo+PiBu ZXcgZmlsZSBtb2RlIDEwMDY0NAo+PiBpbmRleCAwMDAwMDAwMDAwMDAuLjk1ZjBmYWNiMDQ3Ngo+ PiAtLS0gL2Rldi9udWxsCj4+ICsrKyBiL2FyY2gvYXJtNjQvYm9vdC9kdHMvbnV2b3Rvbi9tYTM1 ZDEtZXZiLmR0cwo+PiBAQCAtMCwwICsxLDI0IEBACj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRp ZmllcjogKEdQTC0yLjAtb25seSBPUiBCU0QtMi1DbGF1c2UpCj4+ICsvKgo+PiArICogRGV2aWNl IFRyZWUgU291cmNlIGZvciBNQTM1RDEgRXZhbHVhdGlvbiBCb2FyZCAoRVZCKQo+PiArICoKPj4g KyAqIENvcHlyaWdodCAoQykgMjAyMiBOdXZvdG9uIFRlY2hub2xvZ3kgQ29ycC4KPj4gKyAqLwo+ PiArCj4+ICsvZHRzLXYxLzsKPj4gKyNpbmNsdWRlICJtYTM1ZDEuZHRzaSIKPj4gKwo+PiArLyB7 Cj4+ICsJbW9kZWwgPSAiTnV2b3RvbiBNQTM1RDEtRVZCIjsKPj4gKwljb21wYXRpYmxlID0gIm51 dm90b24sbWEzNWQxLWV2YiIsICJudXZvdG9uLG1hMzVkMSI7Cj4+ICsKPj4gKwljaG9zZW4gewo+ PiArCQlzdGRvdXQtcGF0aCA9ICJzZXJpYWwwOjExNTIwMG44IjsKPj4gKwl9Owo+PiArCj4+ICsJ bWVtb3J5QDgwMDAwMDAwIHsKPj4gKwkJZGV2aWNlX3R5cGUgPSAibWVtb3J5IjsKPj4gKwkJcmVn ID0gPDB4MCAweDgwMDAwMDAwIDB4MCAweDEwMDAwMDAwPjsKPj4gKwl9Owo+PiArfTsKPj4gKwo+ Cj4gLmdpdC9yZWJhc2UtYXBwbHkvcGF0Y2g6NjA6IG5ldyBibGFuayBsaW5lIGF0IEVPRi4KPgo+ ICsKPgo+IHdhcm5pbmc6IDEgbGluZSBhZGRzIHdoaXRlc3BhY2UgZXJyb3JzLgo+CgpJIHdpbGwg Zml4IGl0LgoKPgo+PiBkaWZmIC0tZ2l0IGEvYXJjaC9hcm02NC9ib290L2R0cy9udXZvdG9uL21h MzVkMS5kdHNpIGIvYXJjaC9hcm02NC9ib290L2R0cy9udXZvdG9uL21hMzVkMS5kdHNpCj4+IG5l dyBmaWxlIG1vZGUgMTAwNjQ0Cj4+IGluZGV4IDAwMDAwMDAwMDAwMC4uNzIxMmY4ZGU2OTA2Cj4+ IC0tLSAvZGV2L251bGwKPj4gKysrIGIvYXJjaC9hcm02NC9ib290L2R0cy9udXZvdG9uL21hMzVk MS5kdHNpCj4+IEBAIC0wLDAgKzEsMTIwIEBACj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmll cjogKEdQTC0yLjAtb25seSBPUiBCU0QtMi1DbGF1c2UpCj4+ICsvKgo+PiArICogQ29weXJpZ2h0 IChjKSAyMDIyIE51dm90b24gVGVjaG5vbG9neSBDb3JwLgo+PiArICovCj4+ICsKPj4gKyNpbmNs dWRlIDxkdC1iaW5kaW5ncy9pbnRlcnJ1cHQtY29udHJvbGxlci9hcm0tZ2ljLmg+Cj4+ICsjaW5j bHVkZSA8ZHQtYmluZGluZ3MvaW5wdXQvaW5wdXQuaD4KPj4gKyNpbmNsdWRlIDxkdC1iaW5kaW5n cy9ncGlvL2dwaW8uaD4KPj4gKyNpbmNsdWRlIDxkdC1iaW5kaW5ncy9jbG9jay9udXZvdG9uLG1h MzVkMS1jbGsuaD4KPj4gKwo+PiArLyB7Cj4+ICsJY29tcGF0aWJsZSA9ICJudXZvdG9uLG1hMzVk MSI7Cj4+ICsJaW50ZXJydXB0LXBhcmVudCA9IDwmZ2ljPjsKPj4gKwkjYWRkcmVzcy1jZWxscyA9 IDwyPjsKPj4gKwkjc2l6ZS1jZWxscyA9IDwyPjsKPj4gKwo+PiArCWNwdXMgewo+PiArCQkjYWRk cmVzcy1jZWxscyA9IDwxPjsKPj4gKwkJI3NpemUtY2VsbHMgPSA8MD47Cj4+ICsJCWNwdS1tYXAg ewo+PiArCQkJY2x1c3RlcjAgewo+PiArCQkJCWNvcmUwIHsKPj4gKwkJCQkJY3B1ID0gPCZjcHUw PjsKPj4gKwkJCQl9Owo+PiArCQkJCWNvcmUxIHsKPj4gKwkJCQkJY3B1ID0gPCZjcHUxPjsKPj4g KwkJCQl9Owo+PiArCQkJfTsKPj4gKwkJfTsKPj4gKwo+PiArCQljcHUwOiBjcHVAMCB7Cj4+ICsJ CQlkZXZpY2VfdHlwZSA9ICJjcHUiOwo+PiArCQkJY29tcGF0aWJsZSA9ICJhcm0sY29ydGV4LWEz NSI7Cj4+ICsJCQlyZWcgPSA8MHgwPjsKPj4gKwkJCWVuYWJsZS1tZXRob2QgPSAicHNjaSI7Cj4+ ICsJCQluZXh0LWxldmVsLWNhY2hlID0gPCZMMl8wPjsKPj4gKwkJfTsKPj4gKwo+PiArCQljcHUx OiBjcHVAMSB7Cj4+ICsJCQlkZXZpY2VfdHlwZSA9ICJjcHUiOwo+PiArCQkJY29tcGF0aWJsZSA9 ICJhcm0sY29ydGV4LWEzNSI7Cj4+ICsJCQlyZWcgPSA8MHgxPjsKPj4gKwkJCWVuYWJsZS1tZXRo b2QgPSAicHNjaSI7Cj4+ICsJCQluZXh0LWxldmVsLWNhY2hlID0gPCZMMl8wPjsKPj4gKwkJfTsK Pj4gKwo+PiArCQlMMl8wOiBsMi1jYWNoZTAgewo+PiArCQkJY29tcGF0aWJsZSA9ICJjYWNoZSI7 Cj4+ICsJCQljYWNoZS1sZXZlbCA9IDwyPjsKPj4gKwkJfTsKPj4gKwl9Owo+PiArCj4+ICsJcHNj aSB7Cj4+ICsJCWNvbXBhdGlibGUgPSAiYXJtLHBzY2ktMC4yIjsKPj4gKwkJbWV0aG9kID0gInNt YyI7Cj4+ICsJfTsKPj4gKwo+PiArCWh4dF8yNG06IGh4dF8yNG1oeiB7Cj4gTm8gdW5kZXJzY29y ZXMgaW4gbm9kZSBuYW1lLiBHZW5lcmljIG5vZGUgbmFtZXMsIHNvICJjbG9jay1YIiBvcgo+ICJj bG9jay1zb21lLXN1ZmZpeCIKCk9LLCBJIHdpbGwgbW9kaWZ5IGl0IGFzCiDCoGh4dC0yNG06IGh4 dC0yNG1oegoKPj4gKwkJY29tcGF0aWJsZSA9ICJmaXhlZC1jbG9jayI7Cj4+ICsJCSNjbG9jay1j ZWxscyA9IDwwPjsKPj4gKwkJY2xvY2stZnJlcXVlbmN5ID0gPDI0MDAwMDAwPjsKPiBUaGlzIGRv ZXMgbm90IGxvb2sgbGlrZSBwcm9wZXJ0eSBvZiBTb0MuIFdoZXJlIGlzIHRoaXMgY2xvY2sgZGVm aW5lZD8gSW4KPiB0aGUgU29DIG9yIG9uIHRoZSBib2FyZD8KCkl0J3MgYW4gZXh0ZXJuYWwgY3J5 c3RhbCBvbiB0aGUgYm9hcmQuCkkgYWRkIHRoaXMgbm9kZSwgYmVjYXVzZSBpdCdzIHRoZSBjbG9j ayBzb3VyY2Ugb2YgY2xvY2sgY29udHJvbGxlci4KSXQgYWx3YXlzIHByZXNlbnQgb24gYWxsIG1h MzVkMSBib2FyZHMuCgogwqDCoMKgIGNsazogY2xvY2stY29udHJvbGxlckA0MDQ2MDIwMCB7CiDC oMKgIMKgwqDCoMKgIGNvbXBhdGlibGUgPSAibnV2b3RvbixtYTM1ZDEtY2xrIjsKIMKgwqAgwqDC oMKgwqAgcmVnID0gPDB4MCAweDQwNDYwMjAwIDB4MCAweDEwMD47CiDCoMKgIMKgwqDCoMKgICNj bG9jay1jZWxscyA9IDwxPjsKIMKgwqAgwqDCoMKgwqAgY2xvY2tzID0gPCZoeHRfMjRtPjsKIMKg wqAgwqDCoMKgwqAgY2xvY2stbmFtZXMgPSAiSFhUXzI0TUh6IjsKLi4uCgo+PiArCQljbG9jay1v dXRwdXQtbmFtZXMgPSAiSFhUXzI0TUh6IjsKPj4gKwl9Owo+PiArCj4+ICsJdGltZXIgewo+PiAr CQljb21wYXRpYmxlID0gImFybSxhcm12OC10aW1lciI7Cj4+ICsJCWludGVycnVwdHMgPSA8R0lD X1BQSSAxMyAoR0lDX0NQVV9NQVNLX1NJTVBMRSg0KSB8Cj4+ICsJCQkJCSAgSVJRX1RZUEVfTEVW RUxfTE9XKT4sCj4+ICsJCQkgICAgIDxHSUNfUFBJIDE0IChHSUNfQ1BVX01BU0tfU0lNUExFKDQp IHwKPj4gKwkJCQkJICBJUlFfVFlQRV9MRVZFTF9MT1cpPiwKPj4gKwkJCSAgICAgPEdJQ19QUEkg MTEgKEdJQ19DUFVfTUFTS19TSU1QTEUoNCkgfAo+PiArCQkJCQkgIElSUV9UWVBFX0xFVkVMX0xP Vyk+LAo+PiArCQkJICAgICA8R0lDX1BQSSAxMCAoR0lDX0NQVV9NQVNLX1NJTVBMRSg0KSB8Cj4+ ICsJCQkJCSAgSVJRX1RZUEVfTEVWRUxfTE9XKT47Cj4+ICsJCWNsb2NrLWZyZXF1ZW5jeSA9IDwx MjAwMDAwMD47Cj4+ICsJfTsKPj4gKwo+PiArCXN5czogc3lzdGVtLWNvbnRyb2xsZXJANDA0NjAw MDAgewo+PiArCQljb21wYXRpYmxlID0gIm51dm90b24sbWEzNWQxLXN5cyIsICJzeXNjb24iLCAi c2ltcGxlLW1mZCI7Cj4gV2h5IGlzIHRoaXMgYSBzaW1wbGUtbWZkIGlmIHRoZXJlIGFyZSBubyBj aGlsZHJlbiBoZXJlPyBXaGF0IGRvIHlvdSB3YW50Cj4gdG8gaW5zdGFudGlhdGUgaGVyZT8KCkl0 J3Mgbm90IGEgZGV2aWNlLCBidXQgYSBzZXQgb2YgcmVnaXN0ZXJzIGZvciBzeXN0ZW0gbGV2ZWwg Y29udHJvbC4KSSB3YW50IHRvIHByb3ZpZGUgYSByZWdpc3RlciBiYXNlIG1hcHBpbmcgZm9yIG90 aGVyIGRldmljZXMgdG8gYWNjZXNzIApzeXN0ZW0gY29udHJvbCByZWdpc3RlcnMuCgo+IFdoZXJl IGlzIHRoZSBudXZvdG9uLG1hMzVkMS1zeXMgY29tcGF0aWJsZSBkb2N1bWVudGVkPwoKT0ssIEkg d2lsbCBhZGQgdGhlIGNvbXBhdGlibGUgZG9jdW1lbnQgaW4gbmV4dCB2ZXJzaW9uLgoKCj4+ICsJ CXJlZyA9IDwweDAgMHg0MDQ2MDAwMCAweDAgMHg0MDA+Owo+PiArCX07Cj4+ICsKPj4gKwlyZXNl dDogcmVzZXQtY29udHJvbGxlciB7Cj4+ICsJCWNvbXBhdGlibGUgPSAibnV2b3RvbixtYTM1ZDEt cmVzZXQiOwo+IEFsc28gbm90IGRvY3VtZW50ZWQuCgpJIHdpbGwgYWxzbyBhZGQgdGhlIGRvY3Vt ZW50IGZvciBpdC4KCj4KPj4gKwkJbnV2b3RvbixtYTM1ZDEtc3lzID0gPCZzeXM+Owo+PiArCQkj cmVzZXQtY2VsbHMgPSA8MT47Cj4+ICsJfTsKPj4gKwo+PiArCWNsazogY2xvY2stY29udHJvbGxl ckA0MDQ2MDIwMCB7Cj4+ICsJCWNvbXBhdGlibGUgPSAibnV2b3RvbixtYTM1ZDEtY2xrIjsKPj4g KwkJcmVnID0gPDB4MCAweDQwNDYwMjAwIDB4MCAweDEwMD47Cj4+ICsJCSNjbG9jay1jZWxscyA9 IDwxPjsKPj4gKwkJY2xvY2tzID0gPCZoeHRfMjRtPjsKPj4gKwkJY2xvY2stbmFtZXMgPSAiSFhU XzI0TUh6IjsKPiBQbGVhc2UgdGVzdCB5b3VyIERUUyB3aXRoIG1ha2UgZHRic19jaGVjay4KPgo+ IERvbid0IHNlbmQgRFRTIHdoaWNoIGRvZXMgbm90IHBhc3MgdGhlIGNoZWNrcy4gSXQgaXMgdW5u ZWNlc3NhcnkgdXNlIG9mCj4gcmV2aWV3ZXJzIHRpbWUgd2hlbiB0aGUgc2FtZSBqb2IgY2FuIGJl IGRvbmUgYnkgYXV0b21hdGVkIHRvb2xzLgo+Cj4gQmVzdCByZWdhcmRzLAo+IEtyenlzenRvZgoK WWVzLCBJIHJlYWQgdGhlICJ3cml0aW5nLXNjaGVtYS5yc3QiIGFuZCBrbm93IGhvdyB0byBkbyBu b3cuClRoYW5rIHlvdS4KClNpbmNlcmVseSwKSmFja3kgSHVhbmcKCgoKX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5n IGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5p bmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=