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Mon, 20 Sep 2021 13:28:34 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 942F5A404D; Mon, 20 Sep 2021 13:28:29 +0000 (GMT) Received: from [9.43.114.206] (unknown [9.43.114.206]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 20 Sep 2021 13:28:29 +0000 (GMT) Message-ID: <4710b971-12f0-e6cc-545a-9c7ee96d6057@linux.ibm.com> Date: Mon, 20 Sep 2021 18:58:28 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 Subject: Re: [PATCH v2 3/8] bpf powerpc: refactor JIT compiler code Content-Language: en-US To: Christophe Leroy , naveen.n.rao@linux.ibm.com, mpe@ellerman.id.au, ast@kernel.org, daniel@iogearbox.net Cc: paulus@samba.org, andrii@kernel.org, kafai@fb.com, songliubraving@fb.com, yhs@fb.com, john.fastabend@gmail.com, kpsingh@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, linuxppc-dev@lists.ozlabs.org References: <20210917153047.177141-1-hbathini@linux.ibm.com> <20210917153047.177141-4-hbathini@linux.ibm.com> From: Hari Bathini In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Xh5bJFO4xu8Jz_AF2mhhttQ4q-7NC0PV X-Proofpoint-ORIG-GUID: _19XF3e6ajpK5myoVRHFjw2ul01moovs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-20_07,2021-09-20_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 adultscore=0 clxscore=1015 bulkscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109030001 definitions=main-2109200084 Precedence: bulk List-ID: X-Mailing-List: bpf@vger.kernel.org Hi Christophe, Thanks for reviewing the series. On 17/09/21 9:40 pm, Christophe Leroy wrote: > > > Le 17/09/2021 à 17:30, Hari Bathini a écrit : >> Refactor powerpc JITing. This simplifies adding BPF_PROBE_MEM support. > > Could you describe a bit more what you are refactoring exactly ? I am trying to do more than BPF_PROBE_MEM needs. Will keep the changes minimal (BPF_PROBE_MEM specific) and update the changelog.. > > >> >> Signed-off-by: Hari Bathini >> --- >> >> Changes in v2: >> * New patch to refactor a bit of JITing code. >> >> >>   arch/powerpc/net/bpf_jit_comp32.c | 50 +++++++++++--------- >>   arch/powerpc/net/bpf_jit_comp64.c | 76 ++++++++++++++++--------------- >>   2 files changed, 68 insertions(+), 58 deletions(-) >> >> diff --git a/arch/powerpc/net/bpf_jit_comp32.c >> b/arch/powerpc/net/bpf_jit_comp32.c >> index b60b59426a24..c8ae14c316e3 100644 >> --- a/arch/powerpc/net/bpf_jit_comp32.c >> +++ b/arch/powerpc/net/bpf_jit_comp32.c >> @@ -276,17 +276,17 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 >> *image, struct codegen_context * >>       u32 exit_addr = addrs[flen]; >>       for (i = 0; i < flen; i++) { >> -        u32 code = insn[i].code; >>           u32 dst_reg = bpf_to_ppc(ctx, insn[i].dst_reg); >> -        u32 dst_reg_h = dst_reg - 1; >>           u32 src_reg = bpf_to_ppc(ctx, insn[i].src_reg); >> -        u32 src_reg_h = src_reg - 1; >>           u32 tmp_reg = bpf_to_ppc(ctx, TMP_REG); >> +        u32 true_cond, code = insn[i].code; >> +        u32 dst_reg_h = dst_reg - 1; >> +        u32 src_reg_h = src_reg - 1; > > All changes above seems unneeded and not linked to the current patch. > Please leave cosmetic changes outside and focus on necessary changes. > >> +        u32 size = BPF_SIZE(code); >>           s16 off = insn[i].off; >>           s32 imm = insn[i].imm; >>           bool func_addr_fixed; >>           u64 func_addr; >> -        u32 true_cond; >>           /* >>            * addrs[] maps a BPF bytecode address into a real offset from >> @@ -809,25 +809,33 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 >> *image, struct codegen_context * >>           /* >>            * BPF_LDX >>            */ >> -        case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + >> off) */ >> -            EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); >> -            if (!fp->aux->verifier_zext) >> -                EMIT(PPC_RAW_LI(dst_reg_h, 0)); >> -            break; >> -        case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + >> off) */ >> -            EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); >> -            if (!fp->aux->verifier_zext) >> -                EMIT(PPC_RAW_LI(dst_reg_h, 0)); >> -            break; >> -        case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + >> off) */ >> -            EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); >> -            if (!fp->aux->verifier_zext) >> +        /* dst = *(u8 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_B: >> +        /* dst = *(u16 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_H: >> +        /* dst = *(u32 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_W: >> +        /* dst = *(u64 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_DW: > Why changing the location of the comments ? I found it more readable > before. Sure. I will revert that change. >> +            switch (size) { >> +            case BPF_B: >> +                EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); >> +                break; >> +            case BPF_H: >> +                EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); >> +                break; >> +            case BPF_W: >> +                EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); >> +                break; >> +            case BPF_DW: >> +                EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off)); >> +                EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4)); >> +                break; >> +            } > > BPF_B, BPF_H, ... are not part of an enum. Are you sure GCC is happy to > have no default ? I used gcc 10.3 for ppc32 & gcc 8.3 for ppc64. No warnings. Though, no harm adding the below, I guess.. default: break; Thanks Hari From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.1 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AFBEC433F5 for ; Mon, 20 Sep 2021 13:29:49 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C2A86109D for ; Mon, 20 Sep 2021 13:29:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3C2A86109D Authentication-Results: mail.kernel.org; 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Mon, 20 Sep 2021 13:28:34 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 942F5A404D; Mon, 20 Sep 2021 13:28:29 +0000 (GMT) Received: from [9.43.114.206] (unknown [9.43.114.206]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 20 Sep 2021 13:28:29 +0000 (GMT) Message-ID: <4710b971-12f0-e6cc-545a-9c7ee96d6057@linux.ibm.com> Date: Mon, 20 Sep 2021 18:58:28 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 Subject: Re: [PATCH v2 3/8] bpf powerpc: refactor JIT compiler code Content-Language: en-US To: Christophe Leroy , naveen.n.rao@linux.ibm.com, mpe@ellerman.id.au, ast@kernel.org, daniel@iogearbox.net References: <20210917153047.177141-1-hbathini@linux.ibm.com> <20210917153047.177141-4-hbathini@linux.ibm.com> From: Hari Bathini In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Xh5bJFO4xu8Jz_AF2mhhttQ4q-7NC0PV X-Proofpoint-ORIG-GUID: _19XF3e6ajpK5myoVRHFjw2ul01moovs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-20_07,2021-09-20_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 adultscore=0 clxscore=1015 bulkscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109030001 definitions=main-2109200084 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: songliubraving@fb.com, netdev@vger.kernel.org, john.fastabend@gmail.com, andrii@kernel.org, kpsingh@kernel.org, paulus@samba.org, yhs@fb.com, bpf@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, kafai@fb.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Hi Christophe, Thanks for reviewing the series. On 17/09/21 9:40 pm, Christophe Leroy wrote: > > > Le 17/09/2021 à 17:30, Hari Bathini a écrit : >> Refactor powerpc JITing. This simplifies adding BPF_PROBE_MEM support. > > Could you describe a bit more what you are refactoring exactly ? I am trying to do more than BPF_PROBE_MEM needs. Will keep the changes minimal (BPF_PROBE_MEM specific) and update the changelog.. > > >> >> Signed-off-by: Hari Bathini >> --- >> >> Changes in v2: >> * New patch to refactor a bit of JITing code. >> >> >>   arch/powerpc/net/bpf_jit_comp32.c | 50 +++++++++++--------- >>   arch/powerpc/net/bpf_jit_comp64.c | 76 ++++++++++++++++--------------- >>   2 files changed, 68 insertions(+), 58 deletions(-) >> >> diff --git a/arch/powerpc/net/bpf_jit_comp32.c >> b/arch/powerpc/net/bpf_jit_comp32.c >> index b60b59426a24..c8ae14c316e3 100644 >> --- a/arch/powerpc/net/bpf_jit_comp32.c >> +++ b/arch/powerpc/net/bpf_jit_comp32.c >> @@ -276,17 +276,17 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 >> *image, struct codegen_context * >>       u32 exit_addr = addrs[flen]; >>       for (i = 0; i < flen; i++) { >> -        u32 code = insn[i].code; >>           u32 dst_reg = bpf_to_ppc(ctx, insn[i].dst_reg); >> -        u32 dst_reg_h = dst_reg - 1; >>           u32 src_reg = bpf_to_ppc(ctx, insn[i].src_reg); >> -        u32 src_reg_h = src_reg - 1; >>           u32 tmp_reg = bpf_to_ppc(ctx, TMP_REG); >> +        u32 true_cond, code = insn[i].code; >> +        u32 dst_reg_h = dst_reg - 1; >> +        u32 src_reg_h = src_reg - 1; > > All changes above seems unneeded and not linked to the current patch. > Please leave cosmetic changes outside and focus on necessary changes. > >> +        u32 size = BPF_SIZE(code); >>           s16 off = insn[i].off; >>           s32 imm = insn[i].imm; >>           bool func_addr_fixed; >>           u64 func_addr; >> -        u32 true_cond; >>           /* >>            * addrs[] maps a BPF bytecode address into a real offset from >> @@ -809,25 +809,33 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 >> *image, struct codegen_context * >>           /* >>            * BPF_LDX >>            */ >> -        case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + >> off) */ >> -            EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); >> -            if (!fp->aux->verifier_zext) >> -                EMIT(PPC_RAW_LI(dst_reg_h, 0)); >> -            break; >> -        case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + >> off) */ >> -            EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); >> -            if (!fp->aux->verifier_zext) >> -                EMIT(PPC_RAW_LI(dst_reg_h, 0)); >> -            break; >> -        case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + >> off) */ >> -            EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); >> -            if (!fp->aux->verifier_zext) >> +        /* dst = *(u8 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_B: >> +        /* dst = *(u16 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_H: >> +        /* dst = *(u32 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_W: >> +        /* dst = *(u64 *)(ul) (src + off) */ >> +        case BPF_LDX | BPF_MEM | BPF_DW: > Why changing the location of the comments ? I found it more readable > before. Sure. I will revert that change. >> +            switch (size) { >> +            case BPF_B: >> +                EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); >> +                break; >> +            case BPF_H: >> +                EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); >> +                break; >> +            case BPF_W: >> +                EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); >> +                break; >> +            case BPF_DW: >> +                EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off)); >> +                EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4)); >> +                break; >> +            } > > BPF_B, BPF_H, ... are not part of an enum. Are you sure GCC is happy to > have no default ? I used gcc 10.3 for ppc32 & gcc 8.3 for ppc64. No warnings. Though, no harm adding the below, I guess.. default: break; Thanks Hari