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Sat, 4 Sep 2021 01:40:16 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 4 Sep 2021 16:40:15 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 4 Sep 2021 16:40:14 +0800 Message-ID: <4787120f25e76ed3727e10011522fc075da52e32.camel@mediatek.com> Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define From: zhiyong.tao To: Chen-Yu Tsai CC: Rob Herring , Linus Walleij , Mark Rutland , "Matthias Brugger" , Sean Wang , srv_heupstream , , "Eddie Huang" , Light Hsieh , Biao Huang , Hongzhou Yang , Sean Wang , "Seiya Wang" , Devicetree List , LKML , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , "open list:GPIO SUBSYSTEM" Date: Sat, 4 Sep 2021 16:40:16 +0800 In-Reply-To: References: <20210830003603.31864-1-zhiyong.tao@mediatek.com> <20210830003603.31864-2-zhiyong.tao@mediatek.com> <1630551265.2247.11.camel@mhfsdcap03> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210904_014025_142462_88716F4F X-CRM114-Status: GOOD ( 38.11 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote: > On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao > wrote: > > > > On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote: > > > On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao < > > > zhiyong.tao@mediatek.com> wrote: > > > > > > > > This patch adds rsel define for mt8195. > > > > > > > > Signed-off-by: Zhiyong Tao > > > > --- > > > > include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ > > > > 1 file changed, 9 insertions(+) > > > > > > > > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt- > > > > bindings/pinctrl/mt65xx.h > > > > index 7e16e58fe1f7..f5934abcd1bd 100644 > > > > --- a/include/dt-bindings/pinctrl/mt65xx.h > > > > +++ b/include/dt-bindings/pinctrl/mt65xx.h > > > > @@ -16,6 +16,15 @@ > > > > #define MTK_PUPD_SET_R1R0_10 102 > > > > #define MTK_PUPD_SET_R1R0_11 103 > > > > > > > > +#define MTK_PULL_SET_RSEL_000 200 > > > > +#define MTK_PULL_SET_RSEL_001 201 > > > > +#define MTK_PULL_SET_RSEL_010 202 > > > > +#define MTK_PULL_SET_RSEL_011 203 > > > > +#define MTK_PULL_SET_RSEL_100 204 > > > > +#define MTK_PULL_SET_RSEL_101 205 > > > > +#define MTK_PULL_SET_RSEL_110 206 > > > > +#define MTK_PULL_SET_RSEL_111 207 > > > > > > Could you keep the spacing between constants tighter, or have no > > > spacing > > > at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so > > > on. This > > > would reduce the chance of new macro values colliding with actual > > > resistor > > > values set in the datasheets, plus a contiguous space would be > > > easy to > > > rule as macros. > > > > > > ChenYu > > > > Hi chenyu, > > By the current solution, it won't be mixed used by > > MTK_PULL_SET_RSEL_XXX > > and real resistor value. > > If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which > > means how much resistor value. > > What I meant was that by keeping the value space tight, we avoid the > situation where in some new chip, one of the RSEL resistors happens > to > be 200 or 300 ohms. 100 is already taken, so there's nothing we can > do if new designs actually do have 100 ohm settings. > > > We think that we don't contiguous macro space for different > > register. > > It may increase code complexity to make having > > MTK_PULL_SET_RSEL_000 > > defined as 104. > > Can you elaborate? It is a simple range check and offset handling. > Are > you concerned that a new design would have R2R1R0 and you would like > the macros to be contiguous? > > BTW I don't quite get why decimal base values (100, 200, etc.) were > chosen. One would think that binary bases are easier to handle in > code. > > > ChenYu > Yes,we concerned that a new design would have R2R1R0 and we would like the macros to be contiguous in the feature. we reserve it. We think that decimal and binary base values are the same for the feature. > > Thanks. > > > > > > > > > #define MTK_DRIVE_2mA 2 > > > > #define MTK_DRIVE_4mA 4 > > > > #define MTK_DRIVE_6mA 6 > > > > -- > > > > 2.18.0 > > > > _______________________________________________ > > > > Linux-mediatek mailing list > > > > Linux-mediatek@lists.infradead.org > > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 168A0C433F5 for ; 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b=oZP0qshlzMhvdZE16fGZqAO8jEFLnzS6eTDmEn7GnKvL5nvSTBYQctoV547TFWUYcAMuEBDuxEUcEDcab3o7FCE/8SbljW4jtjBeOaaReLjdEwDLL/j4SKChc2Sf2M0Yepv5ug4diCISL5gHUxRbDxAGiF8hgUXVuD2Vgnsgtuk=; X-UUID: 9cf38ce73db14d9b9fbc3c536884b675-20210904 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 787763427; Sat, 04 Sep 2021 01:40:18 -0700 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 4 Sep 2021 01:40:16 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 4 Sep 2021 16:40:15 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 4 Sep 2021 16:40:14 +0800 Message-ID: <4787120f25e76ed3727e10011522fc075da52e32.camel@mediatek.com> Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define From: zhiyong.tao To: Chen-Yu Tsai CC: Rob Herring , Linus Walleij , Mark Rutland , "Matthias Brugger" , Sean Wang , srv_heupstream , , "Eddie Huang" , Light Hsieh , Biao Huang , Hongzhou Yang , Sean Wang , "Seiya Wang" , Devicetree List , LKML , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , "open list:GPIO SUBSYSTEM" Date: Sat, 4 Sep 2021 16:40:16 +0800 In-Reply-To: References: <20210830003603.31864-1-zhiyong.tao@mediatek.com> <20210830003603.31864-2-zhiyong.tao@mediatek.com> <1630551265.2247.11.camel@mhfsdcap03> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210904_014025_142462_88716F4F X-CRM114-Status: GOOD ( 38.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote: > On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao > wrote: > > > > On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote: > > > On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao < > > > zhiyong.tao@mediatek.com> wrote: > > > > > > > > This patch adds rsel define for mt8195. > > > > > > > > Signed-off-by: Zhiyong Tao > > > > --- > > > > include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ > > > > 1 file changed, 9 insertions(+) > > > > > > > > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt- > > > > bindings/pinctrl/mt65xx.h > > > > index 7e16e58fe1f7..f5934abcd1bd 100644 > > > > --- a/include/dt-bindings/pinctrl/mt65xx.h > > > > +++ b/include/dt-bindings/pinctrl/mt65xx.h > > > > @@ -16,6 +16,15 @@ > > > > #define MTK_PUPD_SET_R1R0_10 102 > > > > #define MTK_PUPD_SET_R1R0_11 103 > > > > > > > > +#define MTK_PULL_SET_RSEL_000 200 > > > > +#define MTK_PULL_SET_RSEL_001 201 > > > > +#define MTK_PULL_SET_RSEL_010 202 > > > > +#define MTK_PULL_SET_RSEL_011 203 > > > > +#define MTK_PULL_SET_RSEL_100 204 > > > > +#define MTK_PULL_SET_RSEL_101 205 > > > > +#define MTK_PULL_SET_RSEL_110 206 > > > > +#define MTK_PULL_SET_RSEL_111 207 > > > > > > Could you keep the spacing between constants tighter, or have no > > > spacing > > > at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so > > > on. This > > > would reduce the chance of new macro values colliding with actual > > > resistor > > > values set in the datasheets, plus a contiguous space would be > > > easy to > > > rule as macros. > > > > > > ChenYu > > > > Hi chenyu, > > By the current solution, it won't be mixed used by > > MTK_PULL_SET_RSEL_XXX > > and real resistor value. > > If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which > > means how much resistor value. > > What I meant was that by keeping the value space tight, we avoid the > situation where in some new chip, one of the RSEL resistors happens > to > be 200 or 300 ohms. 100 is already taken, so there's nothing we can > do if new designs actually do have 100 ohm settings. > > > We think that we don't contiguous macro space for different > > register. > > It may increase code complexity to make having > > MTK_PULL_SET_RSEL_000 > > defined as 104. > > Can you elaborate? It is a simple range check and offset handling. > Are > you concerned that a new design would have R2R1R0 and you would like > the macros to be contiguous? > > BTW I don't quite get why decimal base values (100, 200, etc.) were > chosen. One would think that binary bases are easier to handle in > code. > > > ChenYu > Yes,we concerned that a new design would have R2R1R0 and we would like the macros to be contiguous in the feature. we reserve it. We think that decimal and binary base values are the same for the feature. > > Thanks. > > > > > > > > > #define MTK_DRIVE_2mA 2 > > > > #define MTK_DRIVE_4mA 4 > > > > #define MTK_DRIVE_6mA 6 > > > > -- > > > > 2.18.0 > > > > _______________________________________________ > > > > Linux-mediatek mailing list > > > > Linux-mediatek@lists.infradead.org > > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel