From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752517AbdEEMee convert rfc822-to-8bit (ORCPT ); Fri, 5 May 2017 08:34:34 -0400 Received: from hermes.aosc.io ([199.195.250.187]:54482 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751435AbdEEMec (ORCPT ); Fri, 5 May 2017 08:34:32 -0400 Date: Fri, 05 May 2017 20:34:16 +0800 In-Reply-To: <20170505123035.pwh3idz73ujrd3hx@lukather> References: <20170504114858.9008-1-icenowy@aosc.io> <20170504114858.9008-12-icenowy@aosc.io> <8ad5de02ffc13348dfc71e9ec203205c@aosc.io> <20170505123035.pwh3idz73ujrd3hx@lukather> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Subject: Re: [linux-sunxi] [PATCH v6 11/13] ARM: dts: sun8i: add DE2 nodes for V3s SoC To: linux-arm-kernel@lists.infradead.org, Maxime Ripard CC: devicetree , linux-kernel-owner@vger.kernel.org, linux-sunxi , linux-kernel , dri-devel , Chen-Yu Tsai , Rob Herring , linux-clk , linux-arm-kernel From: Icenowy Zheng Message-ID: <47D16B11-E976-464C-92AD-213D837C8F68@aosc.io> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 于 2017年5月5日 GMT+08:00 下午8:30:35, Maxime Ripard 写到: >On Fri, May 05, 2017 at 04:53:43PM +0800, icenowy@aosc.io wrote: >> > > + de2_clocks: clock@1000000 { >> > > + compatible = >"allwinner,sun50i-h5-de2-clk"; >> > >> > I am a bit skeptical about this. Since the V3S only has one mixer, >do >> > the clocks >> > for the second one even exist? >> >> It's described in the de_clock.c in the BSP source code, and in >hardware >> these bits can be really set (although without clock output). >> >> So I use this compatible which has still the extra clocks. > >If it's not usable, then it shouldn't be in the code, it's basically >dead code. Thus should we have one more DE2 CCU compatible without mixer1 clocks for V3s? From mboxrd@z Thu Jan 1 00:00:00 1970 From: Icenowy Zheng Subject: Re: [PATCH v6 11/13] ARM: dts: sun8i: add DE2 nodes for V3s SoC Date: Fri, 05 May 2017 20:34:16 +0800 Message-ID: <47D16B11-E976-464C-92AD-213D837C8F68@aosc.io> References: <20170504114858.9008-1-icenowy@aosc.io> <20170504114858.9008-12-icenowy@aosc.io> <8ad5de02ffc13348dfc71e9ec203205c@aosc.io> <20170505123035.pwh3idz73ujrd3hx@lukather> Reply-To: icenowy-h8G6r0blFSE@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20170505123035.pwh3idz73ujrd3hx@lukather> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard Cc: devicetree , linux-kernel-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi , linux-kernel , dri-devel , Chen-Yu Tsai , Rob Herring , linux-clk , linux-arm-kernel List-Id: devicetree@vger.kernel.org =E4=BA=8E 2017=E5=B9=B45=E6=9C=885=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=888:3= 0:35, Maxime Ripard =E5=86=99=E5=88=B0: >On Fri, May 05, 2017 at 04:53:43PM +0800, icenowy-h8G6r0blFSE@public.gmane.org wrote: >> > > + de2_clocks: clock@1000000 { >> > > + compatible =3D >"allwinner,sun50i-h5-de2-clk"; >> >=20 >> > I am a bit skeptical about this. Since the V3S only has one mixer, >do >> > the clocks >> > for the second one even exist? >>=20 >> It's described in the de_clock.c in the BSP source code, and in >hardware >> these bits can be really set (although without clock output). >>=20 >> So I use this compatible which has still the extra clocks. > >If it's not usable, then it shouldn't be in the code, it's basically >dead code. Thus should we have one more DE2 CCU compatible without mixer1 clocks for V3s? --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (Icenowy Zheng) Date: Fri, 05 May 2017 20:34:16 +0800 Subject: [linux-sunxi] [PATCH v6 11/13] ARM: dts: sun8i: add DE2 nodes for V3s SoC In-Reply-To: <20170505123035.pwh3idz73ujrd3hx@lukather> References: <20170504114858.9008-1-icenowy@aosc.io> <20170504114858.9008-12-icenowy@aosc.io> <8ad5de02ffc13348dfc71e9ec203205c@aosc.io> <20170505123035.pwh3idz73ujrd3hx@lukather> Message-ID: <47D16B11-E976-464C-92AD-213D837C8F68@aosc.io> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? 2017?5?5? GMT+08:00 ??8:30:35, Maxime Ripard ??: >On Fri, May 05, 2017 at 04:53:43PM +0800, icenowy at aosc.io wrote: >> > > + de2_clocks: clock at 1000000 { >> > > + compatible = >"allwinner,sun50i-h5-de2-clk"; >> > >> > I am a bit skeptical about this. Since the V3S only has one mixer, >do >> > the clocks >> > for the second one even exist? >> >> It's described in the de_clock.c in the BSP source code, and in >hardware >> these bits can be really set (although without clock output). >> >> So I use this compatible which has still the extra clocks. > >If it's not usable, then it shouldn't be in the code, it's basically >dead code. Thus should we have one more DE2 CCU compatible without mixer1 clocks for V3s?