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From: <Claudiu.Beznea@microchip.com>
To: <robert.hancock@calian.com>, <netdev@vger.kernel.org>
Cc: <davem@davemloft.net>, <kuba@kernel.org>, <robh+dt@kernel.org>,
	<michal.simek@xilinx.com>, <Nicolas.Ferre@microchip.com>,
	<devicetree@vger.kernel.org>
Subject: Re: [PATCH net-next 2/3] net: macb: Added ZynqMP-specific initialization
Date: Thu, 13 Jan 2022 08:04:04 +0000	[thread overview]
Message-ID: <480dc506-5480-245a-97a9-9aaa51d81995@microchip.com> (raw)
In-Reply-To: <20220112181113.875567-3-robert.hancock@calian.com>

On 12.01.2022 20:11, Robert Hancock wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The GEM controllers on ZynqMP were missing some initialization steps which
> are required in some cases when using SGMII mode, which uses the PS-GTR
> transceivers managed by the phy-zynqmp driver.
> 
> The GEM core appears to need a hardware-level reset in order to work
> properly in SGMII mode in cases where the GT reference clock was not
> present at initial power-on. This can be done using a reset mapped to
> the zynqmp-reset driver in the device tree.
> 
> Also, when in SGMII mode, the GEM driver needs to ensure the PHY is
> initialized and powered on when it is initializing.
> 
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> ---
>  drivers/net/ethernet/cadence/macb_main.c | 47 +++++++++++++++++++++++-
>  1 file changed, 46 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index a363da928e8b..65b0360c487a 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -34,7 +34,9 @@
>  #include <linux/udp.h>
>  #include <linux/tcp.h>
>  #include <linux/iopoll.h>
> +#include <linux/phy/phy.h>
>  #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
>  #include "macb.h"
> 
>  /* This structure is only used for MACB on SiFive FU540 devices */
> @@ -4455,6 +4457,49 @@ static int fu540_c000_init(struct platform_device *pdev)
>         return macb_init(pdev);
>  }
> 
> +static int zynqmp_init(struct platform_device *pdev)
> +{
> +       struct net_device *dev = platform_get_drvdata(pdev);
> +       struct macb *bp = netdev_priv(dev);
> +       int ret;
> +
> +       /* Fully reset GEM controller at hardware level using zynqmp-reset driver,
> +        * if mapped in device tree.
> +        */
> +       ret = device_reset(&pdev->dev);
> +       if (ret) {
> +               dev_err_probe(&pdev->dev, ret, "failed to reset controller");
> +               return ret;

If using old device trees this will fail, right? If yes, you should take
care this code will also work with old device trees.

Thank you,
Claudiu Beznea

> +       }
> +
> +       if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) {
> +               /* Ensure PS-GTR PHY device used in SGMII mode is ready */
> +               struct phy *sgmii_phy = devm_phy_get(&pdev->dev, "sgmii-phy");
> +
> +               if (IS_ERR(sgmii_phy)) {
> +                       ret = PTR_ERR(sgmii_phy);
> +                       dev_err_probe(&pdev->dev, ret,
> +                                     "failed to get PS-GTR PHY\n");
> +                       return ret;
> +               }
> +
> +               ret = phy_init(sgmii_phy);
> +               if (ret) {
> +                       dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n",
> +                               ret);
> +                       return ret;
> +               }
> +
> +               ret = phy_power_on(sgmii_phy);
> +               if (ret) {
> +                       dev_err(&pdev->dev, "failed to power on PS-GTR PHY: %d\n",
> +                               ret);
> +                       return ret;
> +               }
> +       }
> +       return macb_init(pdev);
> +}
> +
>  static const struct macb_usrio_config sama7g5_usrio = {
>         .mii = 0,
>         .rmii = 1,
> @@ -4550,7 +4595,7 @@ static const struct macb_config zynqmp_config = {
>                         MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH,
>         .dma_burst_length = 16,
>         .clk_init = macb_clk_init,
> -       .init = macb_init,
> +       .init = zynqmp_init,
>         .jumbo_max_len = 10240,
>         .usrio = &macb_default_usrio,
>  };
> --
> 2.31.1
> 


  parent reply	other threads:[~2022-01-13  8:04 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-12 18:11 [PATCH net-next 0/3] Cadence MACB/GEM support for ZynqMP SGMII Robert Hancock
2022-01-12 18:11 ` [PATCH net-next 1/3] macb: bindings doc: added generic PHY and reset mappings for ZynqMP Robert Hancock
2022-01-13  7:25   ` Michal Simek
2022-01-13 16:34     ` Robert Hancock
2022-01-13 17:43       ` Geert Uytterhoeven
2022-01-13 17:49         ` Robert Hancock
2022-01-12 18:11 ` [PATCH net-next 2/3] net: macb: Added ZynqMP-specific initialization Robert Hancock
2022-01-13  7:27   ` Michal Simek
2022-01-13 10:14     ` Harini Katakam
2022-01-13 17:14       ` Robert Hancock
2022-01-13  8:04   ` Claudiu.Beznea [this message]
2022-01-13 16:32     ` Robert Hancock
2022-01-12 18:11 ` [PATCH net-next 3/3] arm64: dts: zynqmp: Added GEM reset definitions Robert Hancock

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