From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 8 Jan 2020 16:31:55 +0100 Subject: [PULL] u-boot-socfpga/master Message-ID: <4899a5dc-3018-989e-9912-42e68757a9a7@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The following changes since commit 5a8fa095cb848c60c630a83edf30d4fc46101e90: Merge branch 'next' (2020-01-06 17:07:49 -0500) are available in the Git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to 8097aee3abc3b773aceea01f756a38b34b274e1e: ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access (2020-01-07 14:38:34 +0100) ---------------------------------------------------------------- Ley Foon Tan (24): spl: Allow cache drivers to be used in SPL arm: dts: socfpga: Add u-boot, dm-pre-reloc for sysmgr and clkmgr nodes arm: socfpga: Convert reset manager from struct to defines arm: socfpga: Convert system manager from struct to defines arm: socfpga: Convert clock manager from struct to defines arm: socfpga: agilex: Add base address for Intel Agilex SoC arm: socfpga: Move firewall code to firewall file arm: socfpga: Move Stratix10 and Agilex reset manager common code arm: socfpga: agilex: Add reset manager support arm: socfpga: Move Stratix10 and Agilex system manager common code arm: socfpga: agilex: Add system manager support arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz clk: agilex: Add clock driver for Agilex arm: socfpga: agilex: Add clock wrapper functions cache: Add Arteris Ncore cache coherent unit driver arm: agilex: Add clock handoff offset for Agilex ddr: altera: Restructure Stratix 10 SDRAM driver ddr: altera: agilex: Add SDRAM driver for Agilex board: intel: agilex: Add socdk board support for Intel Agilex SoC arm: socfpga: agilex: Add SPL for Agilex SoC arm: dts: agilex: Add base dtsi and devkit dts configs: socfpga: Move Stratix10 and Agilex common CONFIGs arm: socfpga: agilex: Enable Agilex SoC build Simon Goldschmidt (1): configs: socfpga: fix building Stratix10 and Agilex Thor Thayer (2): arm: socfpga: stratix10: Enable SMMU access ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access arch/arm/Kconfig | 4 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga-common-u-boot.dtsi | 8 + arch/arm/dts/socfpga.dtsi | 2 +- arch/arm/dts/socfpga_agilex-u-boot.dtsi | 96 +++++++++++ arch/arm/dts/socfpga_agilex.dtsi | 622 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 39 +++++ arch/arm/dts/socfpga_agilex_socdk.dts | 141 +++++++++++++++ arch/arm/dts/socfpga_arria10.dtsi | 2 +- arch/arm/dts/socfpga_arria10_socdk.dtsi | 8 + arch/arm/dts/socfpga_stratix10.dtsi | 2 +- arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 8 + arch/arm/mach-socfpga/Kconfig | 16 ++ arch/arm/mach-socfpga/Makefile | 17 ++ arch/arm/mach-socfpga/clock_manager.c | 14 +- arch/arm/mach-socfpga/clock_manager_agilex.c | 85 ++++++++++ arch/arm/mach-socfpga/clock_manager_arria10.c | 155 +++++++++-------- arch/arm/mach-socfpga/clock_manager_gen5.c | 211 +++++++++++++---------- arch/arm/mach-socfpga/clock_manager_s10.c | 218 ++++++++++++++---------- arch/arm/mach-socfpga/firewall.c | 107 ++++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 4 + arch/arm/mach-socfpga/include/mach/clock_manager.h | 4 + arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h | 14 ++ arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | 133 ++++++--------- arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h | 112 +++++------- arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 131 ++++++-------- arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h | 21 +++ arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} | 17 +- arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +- arch/arm/mach-socfpga/include/mach/misc.h | 1 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 7 +- arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h | 43 +---- arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h | 22 +-- arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 118 ------------- arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h | 38 +++++ arch/arm/mach-socfpga/include/mach/system_manager.h | 7 +- arch/arm/mach-socfpga/include/mach/system_manager_arria10.h | 94 +++------- arch/arm/mach-socfpga/include/mach/system_manager_gen5.h | 123 +++----------- arch/arm/mach-socfpga/include/mach/system_manager_s10.h | 176 ------------------- arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 123 ++++++++++++++ arch/arm/mach-socfpga/mailbox_s10.c | 6 +- arch/arm/mach-socfpga/misc.c | 66 ++++++++ arch/arm/mach-socfpga/misc_arria10.c | 11 +- arch/arm/mach-socfpga/misc_gen5.c | 38 +++-- arch/arm/mach-socfpga/misc_s10.c | 9 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 73 ++++---- arch/arm/mach-socfpga/reset_manager_gen5.c | 37 ++-- arch/arm/mach-socfpga/reset_manager_s10.c | 56 +++--- arch/arm/mach-socfpga/scan_manager.c | 6 +- arch/arm/mach-socfpga/spl_a10.c | 12 +- arch/arm/mach-socfpga/spl_agilex.c | 98 +++++++++++ arch/arm/mach-socfpga/spl_gen5.c | 26 ++- arch/arm/mach-socfpga/spl_s10.c | 109 ++---------- arch/arm/mach-socfpga/system_manager_gen5.c | 42 +++-- arch/arm/mach-socfpga/system_manager_s10.c | 42 +++-- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 20 ++- board/intel/agilex-socdk/MAINTAINERS | 7 + board/intel/agilex-socdk/Makefile | 7 + board/intel/agilex-socdk/socfpga.c | 7 + common/spl/Kconfig | 6 + configs/socfpga_agilex_defconfig | 60 +++++++ drivers/Makefile | 1 + drivers/cache/Kconfig | 8 + drivers/cache/Makefile | 3 +- drivers/cache/cache-ncore.c | 164 ++++++++++++++++++ drivers/clk/altera/Makefile | 1 + drivers/clk/altera/clk-agilex.c | 579 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/altera/clk-agilex.h | 237 ++++++++++++++++++++++++++ drivers/ddr/altera/Kconfig | 6 +- drivers/ddr/altera/Makefile | 3 +- drivers/ddr/altera/sdram_agilex.c | 168 ++++++++++++++++++ drivers/ddr/altera/sdram_gen5.c | 12 +- drivers/ddr/altera/sdram_s10.c | 320 +++------------------------------- drivers/ddr/altera/sdram_s10.h | 148 +--------------- drivers/ddr/altera/sdram_soc64.c | 305 +++++++++++++++++++++++++++++++++ drivers/ddr/altera/sdram_soc64.h | 187 ++++++++++++++++++++ drivers/fpga/socfpga_arria10.c | 7 +- drivers/fpga/socfpga_gen5.c | 4 +- drivers/mmc/socfpga_dw_mmc.c | 17 +- drivers/sysreset/sysreset_socfpga.c | 6 +- include/configs/socfpga_agilex_socdk.h | 12 ++ include/configs/socfpga_soc64_common.h | 202 ++++++++++++++++++++++ include/configs/socfpga_stratix10_socdk.h | 192 +-------------------- include/dt-bindings/clock/agilex-clock.h | 71 ++++++++ 84 files changed, 4392 insertions(+), 1952 deletions(-) create mode 100644 arch/arm/dts/socfpga_agilex-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_agilex.dtsi create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex.c create mode 100644 arch/arm/mach-socfpga/firewall.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (85%) delete mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h delete mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_soc64.h create mode 100644 arch/arm/mach-socfpga/spl_agilex.c create mode 100644 board/intel/agilex-socdk/MAINTAINERS create mode 100644 board/intel/agilex-socdk/Makefile create mode 100644 board/intel/agilex-socdk/socfpga.c create mode 100644 configs/socfpga_agilex_defconfig create mode 100644 drivers/cache/cache-ncore.c create mode 100644 drivers/clk/altera/clk-agilex.c create mode 100644 drivers/clk/altera/clk-agilex.h create mode 100644 drivers/ddr/altera/sdram_agilex.c create mode 100644 drivers/ddr/altera/sdram_soc64.c create mode 100644 drivers/ddr/altera/sdram_soc64.h create mode 100644 include/configs/socfpga_agilex_socdk.h create mode 100644 include/configs/socfpga_soc64_common.h create mode 100644 include/dt-bindings/clock/agilex-clock.h