From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:44040) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qh0kq-0006ir-QJ for qemu-devel@nongnu.org; Wed, 13 Jul 2011 10:49:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qh0km-0007vM-IE for qemu-devel@nongnu.org; Wed, 13 Jul 2011 10:49:36 -0400 Received: from afflict.kos.to ([92.243.29.197]:47360) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qh0kl-0007vF-RC for qemu-devel@nongnu.org; Wed, 13 Jul 2011 10:49:32 -0400 From: riku.voipio@iki.fi Date: Wed, 13 Jul 2011 17:48:53 +0300 Message-Id: <48e515d4fa7c6ffdc21944ffc8620a161c772c09.1310568214.git.riku.voipio@linaro.org> In-Reply-To: References: Subject: [Qemu-devel] [PATCH 14/15] linux-user: make MIPS and ARM eabi use same argument reordering List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Riku Voipio , "Wesley W. Terpstra" , patches@linaro.org From: Riku Voipio MIPS uses similar calling convention than ARM eabi, where when using 64-bit values some registers are skipped. This patch makes MIPS and ARM eabi share the argument reordering code. This affects ftruncate64, creating insane sized fails (or just failing). Cc: Wesley W. Terpstra Cc: patches@linaro.org Signed-off-by: Riku Voipio --- linux-user/syscall.c | 38 ++++++++++++++++++-------------------- 1 files changed, 18 insertions(+), 20 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 9eb41a0..1dd7aad 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -580,6 +580,17 @@ extern int setfsuid(int); extern int setfsgid(int); extern int setgroups(int, gid_t *); +/* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */ +#ifdef TARGET_ARM +static inline int regpairs_aligned(void *cpu_env) { + return ((((CPUARMState *)cpu_env)->eabi) == 1) ; +} +#elif defined(TARGET_MIPS) +static inline int regpairs_aligned(void *cpu_env) { return 1; } +#else +static inline int regpairs_aligned(void *cpu_env) { return 0; } +#endif + #define ERRNO_TABLE_SIZE 1200 /* target_to_host_errno_table[] is initialized from @@ -4375,13 +4386,10 @@ static inline abi_long target_truncate64(void *cpu_env, const char *arg1, abi_long arg3, abi_long arg4) { -#ifdef TARGET_ARM - if (((CPUARMState *)cpu_env)->eabi) - { + if (regpairs_aligned(cpu_env)) { arg2 = arg3; arg3 = arg4; - } -#endif + } return get_errno(truncate64(arg1, target_offset64(arg2, arg3))); } #endif @@ -4392,13 +4400,10 @@ static inline abi_long target_ftruncate64(void *cpu_env, abi_long arg1, abi_long arg3, abi_long arg4) { -#ifdef TARGET_ARM - if (((CPUARMState *)cpu_env)->eabi) - { + if (regpairs_aligned(cpu_env)) { arg2 = arg3; arg3 = arg4; - } -#endif + } return get_errno(ftruncate64(arg1, target_offset64(arg2, arg3))); } #endif @@ -6857,20 +6862,16 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, #endif #ifdef TARGET_NR_pread case TARGET_NR_pread: -#ifdef TARGET_ARM - if (((CPUARMState *)cpu_env)->eabi) + if (regpairs_aligned(cpu_env)) arg4 = arg5; -#endif if (!(p = lock_user(VERIFY_WRITE, arg2, arg3, 0))) goto efault; ret = get_errno(pread(arg1, p, arg3, arg4)); unlock_user(p, arg2, ret); break; case TARGET_NR_pwrite: -#ifdef TARGET_ARM - if (((CPUARMState *)cpu_env)->eabi) + if (regpairs_aligned(cpu_env)) arg4 = arg5; -#endif if (!(p = lock_user(VERIFY_READ, arg2, arg3, 1))) goto efault; ret = get_errno(pwrite(arg1, p, arg3, arg4)); @@ -7621,14 +7622,11 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, #ifdef TARGET_NR_readahead case TARGET_NR_readahead: #if TARGET_ABI_BITS == 32 -#ifdef TARGET_ARM - if (((CPUARMState *)cpu_env)->eabi) - { + if (regpairs_aligned(cpu_env)) { arg2 = arg3; arg3 = arg4; arg4 = arg5; } -#endif ret = get_errno(readahead(arg1, ((off64_t)arg3 << 32) | arg2, arg4)); #else ret = get_errno(readahead(arg1, arg2, arg3)); -- 1.7.4.1