From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Dai, Wei" Subject: Re: [PATCH] net/ixgbe: fix Rx queue interrupt mapping in VF Date: Tue, 10 Oct 2017 03:25:39 +0000 Message-ID: <49759EB36A64CF4892C1AFEC9231E8D650B9FC8B@PGSMSX106.gar.corp.intel.com> References: <1505902693-51337-1-git-send-email-wei.dai@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: "dev@dpdk.org" , "stable@dpdk.org" To: "Lu, Wenzhuo" , "Ananyev, Konstantin" , "Ma, Jianwei" Return-path: In-Reply-To: <1505902693-51337-1-git-send-email-wei.dai@intel.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, Jianwei How about your test result ? Hi, Wenzhuo Would you please review this patch ? Thanks a lot ! > -----Original Message----- > From: Dai, Wei > Sent: Wednesday, September 20, 2017 6:18 PM > To: Lu, Wenzhuo ; Ananyev, Konstantin > > Cc: dev@dpdk.org; Dai, Wei ; stable@dpdk.org > Subject: [PATCH] net/ixgbe: fix Rx queue interrupt mapping in VF >=20 > When a VF port is bound to VFIO-PCI, miscellaneous interrupt is mapped to > MSI-X vector 0 and Rx queues interrupt are mapped to other vectors in > vfio_enable_msix( ). To simplify implementation, all VFIO-PCI bound ixgbe= VF > Rx queue interrupts can be mapped in vector 1. And as current igb_uio onl= y > support only one vector, ixgbe VF PMD should use vector 0 for igb_uio and > vector 1 for VFIO-PCI. Without this patch, VF Rx queue interrupt is mappe= d > to vector 0 in register settings and mapped to VFIO vector 1 in > vfio_enable_msix( ), and then all Rx queue interrupts will be missed. >=20 > Fixes: b13bfab4cdbe ("eal: reserve VFIO vector zero for misc interrupt") > Cc: stable@dpdk.org >=20 > Signed-off-by: Wei Dai > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 25 ++++++++++++++++++++++--- > 1 file changed, 22 insertions(+), 3 deletions(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > b/drivers/net/ixgbe/ixgbe_ethdev.c > index 9ca5cbc..39a3d8c 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -5029,7 +5029,10 @@ ixgbevf_dev_start(struct rte_eth_dev *dev) >=20 > /* check and configure queue intr-vector mapping */ > if (dev->data->dev_conf.intr_conf.rxq !=3D 0) { > - intr_vector =3D dev->data->nb_rx_queues; > + /* According to datasheet, only vector 0/1/2 can be used, > + * now only one vector is used for Rx queue > + */ > + intr_vector =3D 1; > if (rte_intr_efd_enable(intr_handle, intr_vector)) > return -1; > } > @@ -5556,9 +5559,12 @@ ixgbevf_dev_rx_queue_intr_enable(struct > rte_eth_dev *dev, uint16_t queue_id) > uint32_t mask; > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + uint32_t vec =3D IXGBE_MISC_VEC_ID; >=20 > mask =3D IXGBE_READ_REG(hw, IXGBE_VTEIMS); > - mask |=3D (1 << IXGBE_MISC_VEC_ID); > + if (rte_intr_allow_others(intr_handle)) > + vec =3D IXGBE_RX_VEC_START; > + mask |=3D (1 << vec); > RTE_SET_USED(queue_id); > IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); >=20 > @@ -5573,9 +5579,14 @@ ixgbevf_dev_rx_queue_intr_disable(struct > rte_eth_dev *dev, uint16_t queue_id) > uint32_t mask; > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); > + struct rte_intr_handle *intr_handle =3D &pci_dev->intr_handle; > + uint32_t vec =3D IXGBE_MISC_VEC_ID; >=20 > mask =3D IXGBE_READ_REG(hw, IXGBE_VTEIMS); > - mask &=3D ~(1 << IXGBE_MISC_VEC_ID); > + if (rte_intr_allow_others(intr_handle)) > + vec =3D IXGBE_RX_VEC_START; > + mask &=3D ~(1 << vec); > RTE_SET_USED(queue_id); > IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); >=20 > @@ -5717,6 +5728,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > uint32_t q_idx; > uint32_t vector_idx =3D IXGBE_MISC_VEC_ID; > + uint32_t base =3D IXGBE_MISC_VEC_ID; >=20 > /* Configure VF other cause ivar */ > ixgbevf_set_ivar_map(hw, -1, 1, vector_idx); @@ -5727,6 +5739,11 > @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) > if (!rte_intr_dp_is_en(intr_handle)) > return; >=20 > + if (rte_intr_allow_others(intr_handle)) { > + base =3D IXGBE_RX_VEC_START; > + vector_idx =3D IXGBE_RX_VEC_START; > + } > + > /* Configure all RX queues of VF */ > for (q_idx =3D 0; q_idx < dev->data->nb_rx_queues; q_idx++) { > /* Force all queue use vector 0, > @@ -5734,6 +5751,8 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) > */ > ixgbevf_set_ivar_map(hw, 0, q_idx, vector_idx); > intr_handle->intr_vec[q_idx] =3D vector_idx; > + if (vector_idx < base + intr_handle->nb_efd - 1) > + vector_idx++; > } > } >=20 > -- > 2.7.5