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[187.188.190.73]) by smtp.gmail.com with ESMTPSA id e20-20020ac84e54000000b002e06753cf70sm15274775qtw.6.2022.04.06.07.00.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Apr 2022 07:00:13 -0700 (PDT) Message-ID: <49ca71ae-906e-767d-8d12-9cd0a04d5b6a@linaro.org> Date: Wed, 6 Apr 2022 09:00:11 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH for-7.1 15/18] hw/arm/exynos4210: Don't connect multiple lines to external GIC inputs Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20220404154658.565020-1-peter.maydell@linaro.org> <20220404154658.565020-16-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20220404154658.565020-16-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::f31; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf31.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mitsyanko , Zongyuan Li Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/4/22 10:46, Peter Maydell wrote: > The combiner_grp_to_gic_id[] array includes the EXT_GIC_ID_MCT_G0 > and EXT_GIC_ID_MCT_G1 multiple times. This means that we will > connect multiple IRQs up to the same external GIC input, which > is not permitted. We do the same thing in the code in > exynos4210_init_board_irqs() because the conditionals selecting > an irq_id in the first loop match multiple interrupt IDs. > > Overall we do this for interrupt IDs > (1, 4), (12, 4), (35, 4), (51, 4), (53, 4) for EXT_GIC_ID_MCT_G0 > and > (1, 5), (12, 5), (35, 5), (51, 5), (53, 5) for EXT_GIC_ID_MCT_G1 > > These correspond to the cases for the multi-core timer that we are > wiring up to multiple inputs on the combiner in > exynos4210_combiner_get_gpioin(). That code already deals with all > these interrupt IDs being the same input source, so we don't need to > connect the external GIC interrupt for any of them except the first > (1, 4) and (1, 5). Remove the array entries and conditionals which > were incorrectly causing us to wire up extra lines. > > This bug didn't cause any visible effects, because we only connect > up a device to the "primary" ID values (1, 4) and (1, 5), so the > extra lines would never be set to a level. > > Signed-off-by: Peter Maydell > --- > include/hw/arm/exynos4210.h | 2 +- > hw/arm/exynos4210.c | 12 +++++------- > 2 files changed, 6 insertions(+), 8 deletions(-) Reviewed-by: Richard Henderson r~