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Date: Sat, 30 May 2009 12:23:43 -0700
From: "H. Peter Anvin" <hpa@zytor.com>
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CC: Pavel Machek <pavel@ucw.cz>,
       Linus Torvalds <torvalds@linux-foundation.org>,
       Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
       Ingo Molnar <mingo@elte.hu>,
       "Thomas Gleixner <tglx@linutronix.de> Suresh Siddha" 
	<suresh.siddha@intel.com>,
       Tejun Heo <tj@kernel.org>,
       Venkatesh Pallapadi <venkatesh.pallapadi@intel.com>,
       Zhang Rui <rui.zhang@intel.com>
Subject: Re: [GIT PULL] x86 fixes for 2.6.30-rc8
References: <200905252003.n4PK3sFi014919@voreg.hos.anvin.org> <20090530112234.GB1395@ucw.cz> <200905300713.23741.lkml@morethan.org>
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Michael S. Zick wrote:
> On Sat May 30 2009, Pavel Machek wrote:
>> Hi!
>>
>>> --- a/Documentation/kernel-parameters.txt
>>> +++ b/Documentation/kernel-parameters.txt
>>> @@ -1535,6 +1535,10 @@ and is between 256 and 4096 characters. It is defined in the file
>>>  			register save and restore. The kernel will only save
>>>  			legacy floating-point registers on task switch.
>>>  
>>> +	noxsave		[BUGS=X86] Disables x86 extended register state save
>>> +			and restore using xsave. The kernel will fallback to
>>> +			enabling legacy floating-point and sse state.
>>> +
>> Does that mean apps using sse8 will see their registers corrupted if
>> this option is used? Or are new registers sets always added in a way
>> that kernel has to enable them first?

New register sets always require enabling.

> Has this change been tested on the processors that have independent ftp&sse
> units, without the shared registers?  Such as the VIA C7-M?

x87 and SSE are always separate.  Whether or not register sets are
separate is an architectural issue, and isn't subject to variation
across CPUs.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.