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Date: Thu, 01 Oct 2009 18:33:37 +0200
From: Avi Kivity <avi@redhat.com>
MIME-Version: 1.0
Subject: Re: [Qemu-devel] [PATCH 61/61] pc_q35: apic mode for pci interrupt
	routing.
References: <1254305917-14784-1-git-send-email-yamahata@valinux.co.jp>	<1254305917-14784-62-git-send-email-yamahata@valinux.co.jp>
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To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: qemu-devel@nongnu.org

On 10/01/2009 10:50 AM, Avi Kivity wrote:
> On 09/30/2009 12:18 PM, Isaku Yamahata wrote:
>> apic mode for pci interrupt routing.
>>
>> +static void ich9_lpc_ioapic_update_fn(void *opaque, int reset)
>> +{
>> +    struct ICH9_LPCIrqState *irq_state = opaque;
>> +    struct ICH9_LPCState *ich9_lpc = irq_state->lpc;
>> +
>> +    /* this can be called via gmch_init() where ich9_lpc isn't
>> +       allocated yet */
>> +    if (ich9_lpc == NULL)
>> +        return;
>> +
>> +    if (reset)
>> +        ich9_lpc->apic_mode = 0;
>> +    else
>> +        ich9_lpc->apic_mode = 1;
>> +}
>> +
>
>
> My understanding was that the OS calls ACPI to set APIC mode.  The 
> ACPI routine (_PIC) can then access a register to re-program the 
> interrupt router.
>
> Does this reflect how Q35 works, or is this a shortcut?
>
> On my desktop, I have:
>
>     Name (\GPIC, Zero)
>     Method (\_PIC, 1, NotSerialized)
>     {
>         Store (Arg0, \GPIC)
>     }
>
> With GPIC later referenced by the various interrupt management 
> routines like _PRT; if GPIC is set they return interrupts in the range 
> 16-19, otherwise LNKA-LNKD.

A real P35 does the same thing.  I think it's implemented by having the 
interrupt lines go to both the PCI links and the ioapic INTI16-INTI19 
inputs; when APIC mode is selected the pci links will be disabled and 
the ioapic activated.

-- 
Do not meddle in the internals of kernels, for they are subtle and quick to panic.