From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=40291 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PbLsf-0006HI-M7 for qemu-devel@nongnu.org; Fri, 07 Jan 2011 18:38:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PbLse-0005p4-Lz for qemu-devel@nongnu.org; Fri, 07 Jan 2011 18:38:01 -0500 Received: from b.mail.sonic.net ([64.142.19.5]:50590) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PbLse-0005p0-Az for qemu-devel@nongnu.org; Fri, 07 Jan 2011 18:38:00 -0500 Message-ID: <4D27A3CB.4050900@twiddle.net> Date: Fri, 07 Jan 2011 15:37:47 -0800 From: Richard Henderson MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 0/7] Define "deposit" tcg operation References: <1294440183-885-1-git-send-email-rth@twiddle.net> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org, Aurelien Jarno , Alexander Graf On 01/07/2011 03:10 PM, Peter Maydell wrote: > Unless I've missed something, deposit_i32 is basically the same > as the ARM BFI instruction, so for ARM we could use deposit_i32 in > the implementation of BFI (and conversely implement deposit_i32 > using BFI when we're generating for an ARMv6T2 or better host.) That's correct. I'll admit to not knowing the arm/thumb variants very well. While I can see that gcc sometimes implements its similar "insv" operation with BFC and BFI, knowing under what conditions those are available is ... slightly complex to say the least. r~