From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47084 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PfB8s-0001wh-Gf for qemu-devel@nongnu.org; Tue, 18 Jan 2011 07:58:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PfB8q-00032d-Py for qemu-devel@nongnu.org; Tue, 18 Jan 2011 07:58:34 -0500 Received: from goliath.siemens.de ([192.35.17.28]:18187) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PfB8q-00031s-Fv for qemu-devel@nongnu.org; Tue, 18 Jan 2011 07:58:32 -0500 Message-ID: <4D358E71.3040905@siemens.com> Date: Tue, 18 Jan 2011 13:58:25 +0100 From: Jan Kiszka MIME-Version: 1.0 References: <1292879604-22268-1-git-send-email-agraf@suse.de> <1292879604-22268-9-git-send-email-agraf@suse.de> <4D34542D.7080301@siemens.com> <4D3467B9.3070207@suse.de> <4D346834.8000903@siemens.com> <4D3468A0.3060709@suse.de> <4D346C31.8060300@siemens.com> <4D346F5B.7090502@suse.de> <4D35587F.3050503@redhat.com> <2006A7EF-07DC-4DAA-B6ED-88D24D6B7978@suse.de> In-Reply-To: <2006A7EF-07DC-4DAA-B6ED-88D24D6B7978@suse.de> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 8/8] ahci: fix !msi interrupts List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Kevin Wolf , Joerg Roedel , Sebastian Herbszt , Gerd Hoffmann , qemu-devel Developers On 2011-01-18 13:05, Alexander Graf wrote: > > On 18.01.2011, at 10:08, Gerd Hoffmann wrote: > >> Hi, >> >>>> Worse might also be that unknown issue that force you to inject an IRQ >>>> here. We don't know. That's probably worst. >>> >>> Well, IIRC the issue was that usually a level high interrupt line would >>> simply retrigger an interrupt after enabling the interrupt line in the >>> APIC again. >> >> edge triggered interrupts wouldn't though. > > The code change doesn't change anything for edge triggered interrupts - they work fine. Only !msi (== level) ones are broken. > >> >>> Unless my memory completely fails on me, that didn't happen, >>> so I added the manual retrigger on a partial command ACK in ahci code. >> >> That re-trigger smells like you are not clearing the interrupt line where you should. For starters try calling ahci_check_irq() after guest writes to PORT_IRQ_STAT. > > The problem happened when I had the following: > > ahci irq bits = 0 > > ahci irq bits = 1 | 2 > irq line trigger > guest clears 1 > ahci bits = 2 > > > On normal hardware, the high state of the irq line would simply trigger another interrupt in the guest when it gets ACKed on the LAPIC. Somehow it doesn't get triggered here. I don't see why clearing the interrupt line would help? It's not what real hardware would do, no? > No, real devices would simply leave the line asserted as long as there is a reason to. So again my question: With which irqchips do you see this effect, kvm's in-kernel model and/or qemu's user space model? If there is an issue with retriggering a CPU interrupt while the source is still asserted, that probably needs to be fixed. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux