Re: [Qemu-devel] [PATCH 5/7] tcg-i386: Implement deposit operation.

From: Alexander Graf <agraf@suse.de>
To: Richard Henderson <rth@twiddle.net>
Cc: "Edgar E.Iglesias" <edgar.iglesias@gmail.com>,
	qemu-devel@nongnu.org, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH 5/7] tcg-i386: Implement deposit operation.
Date: Wed, 26 Jan 2011 17:50:43 +0100	[thread overview]
Message-ID: <4D4050E3.9010207@suse.de> (raw)
In-Reply-To: <4D404E66.4020109@twiddle.net>

Richard Henderson wrote:
> On 01/26/2011 08:00 AM, Alexander Graf wrote:
>   
>> Keeping it only inside of the translator would break on page faults, as
>> the lower 32 bits of the register would lie around in a temporary which
>> is invisible for the page fault resolver.
>>     
>
> Given that QEMU doesn't support truely async signals, and the fact that
> the translator can tell which insns can fault, I can't imagine that this
> is actually a problem.
>
> You should get the same sequence of writebacks when translating the TB
> the second time for tcg_gen_code_search_pc.
>
> Am I totally confused here?
>   

Oh, you mean basically to have the following:

TCGv_i32 regs32[16];
TCGv_i64 regs[16];

Then declare both as globals with offset and just switch between the
access type using a disas struct variable. Once the TB ends, I'd
obviously have to sync back to 64 bit again.

Yes, that would work. I'll see if I can get that rolling once I'm done
with the CC optimizations :)

Alex