From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: Re: Hypervisor crash(!) on xl cpupool-numa-split Date: Wed, 9 Feb 2011 14:39:30 +0100 Message-ID: <4D529912.5060505@amd.com> References: <4D41FD3A.5090506@amd.com> <201102021539.06664.stephan.diestelhorst@amd.com> <4D4974D1.1080503@ts.fujitsu.com> <201102021701.05665.stephan.diestelhorst@amd.com> <4D4A43B7.5040707@ts.fujitsu.com> <4D4A72D8.3020502@ts.fujitsu.com> <4D4C08B6.30600@amd.com> <4D4FE7E2.9070605@amd.com> <4D4FF452.6060508@ts.fujitsu.com> <4D50D80F.9000007@ts.fujitsu.com> <4D517051.10402@amd.com> <4D5290C8.8090103@ts.fujitsu.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4D5290C8.8090103@ts.fujitsu.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Juergen Gross Cc: George Dunlap , "xen-devel@lists.xensource.com" , "Diestelhorst, Stephan" List-Id: xen-devel@lists.xenproject.org Juergen Gross wrote: >>> Another interesting thing to note is that the bug happened on pcpu 32, >>> but there were no advertised migrations from that cpu. > > If I understand the configuration of Andre's machine correctly, pcpu32 will > be the target of the next migrations. This pcpu is member of the next numa > node, correct? No, this is a 6-core box, so the NUMA node span pcpu30-35. > > Could it be there is a problem with the call of domain_update_node_affinity() > from cpu_disable_scheduler() ? > > Hmm, I think this could really be the problem. > Andre, could you try the following patch? Sorry, but that one didn't help. It crashed with the well-known BUG_ON: (XEN) Xen BUG at sched_credit.c:990 (which is the weight assert in csched_acct (c/s 22858)) Regards, Andre. > > diff -r f1fac30a531b xen/common/schedule.c > --- a/xen/common/schedule.c Wed Feb 09 08:58:11 2011 +0000 > +++ b/xen/common/schedule.c Wed Feb 09 14:02:12 2011 +0100 > @@ -491,6 +491,10 @@ int cpu_disable_scheduler(unsigned int c > v->domain->domain_id, v->vcpu_id); > cpus_setall(v->cpu_affinity); > affinity_broken = 1; > + } > + if ( cpus_weight(v->cpu_affinity) < NR_CPUS ) > + { > + cpu_clear(cpu, v->cpu_affinity); > } > > if ( v->processor == cpu ) > > > Juergen > -- Andre Przywara AMD-OSRC (Dresden) Tel: x29712