From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [Qemu-devel] KVM call minutes for Feb 8 Date: Sun, 13 Feb 2011 16:43:55 -0600 Message-ID: <4D585EAB.4070100@codemonkey.ws> References: <20110208155557.GM6198@x200.localdomain> <4D51B1C9.3080507@codemonkey.ws> <4D526D0D.9020507@codemonkey.ws> <4D52A86A.1030407@codemonkey.ws> <4D52F20A.7070009@codemonkey.ws> <4D539800.3070802@codemonkey.ws> <4D53BE22.3050706@redhat.com> <4D57FB12.5060703@codemonkey.ws> <4D57FF2E.7020001@redhat.com> <4D580D3E.3000300@codemonkey.ws> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: Anthony Liguori , Chris Wright , kvm@vger.kernel.org, qemu-devel@nongnu.org, Markus Armbruster , Blue Swirl , Avi Kivity To: Peter Maydell Return-path: Received: from mail-gy0-f174.google.com ([209.85.160.174]:58904 "EHLO mail-gy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755048Ab1BMWoB (ORCPT ); Sun, 13 Feb 2011 17:44:01 -0500 Received: by gyb11 with SMTP id 11so1814969gyb.19 for ; Sun, 13 Feb 2011 14:44:01 -0800 (PST) In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On 02/13/2011 03:24 PM, Peter Maydell wrote: > On 13 February 2011 16:56, Anthony Liguori wrote: > >> If we can move away from Bus abstraction and to a simpler interface >> mechanism, then we can express peer relationships by just having bidirection >> references. IOW: >> >> -device cpus,northbridge=nb,id=cpus,count=16 -device i440fx,cpus=cpus >> >> I don't think modelling each CPU makes sense. We should probably just model >> all cpus in a single device for the sake of simplicity. >> > How would this work for systems with multiple CPUs which have different > views of the world? (ie their memory maps differ so that eg some RAM is > shared between them but some parts of the address space are different > RAM for the two cores, some devices one core only, some devices shared > between cores but the device can tell which core made an IO request) > With a bus-style abstraction this is straightforward: each core has its > own bus which is what defines its view of the world, some devices > and RAM are wired up to both buses. I'm not sure how the bidirectional > reference model would look for this? > Each core has it's own northbridge. You would do: -device arm-cpu,northbridge=nb1 -device dsp,northbridge=nb2 Or whatever. Regards, Anthony Liguori > (Real world examples would be if we ever had any need to actually > model any of the auxiliary cores in say an OMAP device, or the > M3 in a versatile-express. Yes, most systems won't look that odd > but it does come up, especially in testbench type designs, and our > interface abstraction should be able to handle it.) > > -- PMM > > From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=51447 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pokfx-0006KK-Kt for qemu-devel@nongnu.org; Sun, 13 Feb 2011 17:44:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pokfi-0007Tw-8y for qemu-devel@nongnu.org; Sun, 13 Feb 2011 17:44:03 -0500 Received: from mail-gw0-f45.google.com ([74.125.83.45]:44960) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pokfi-0007TP-1E for qemu-devel@nongnu.org; Sun, 13 Feb 2011 17:44:02 -0500 Received: by gwaa12 with SMTP id a12so2007196gwa.4 for ; Sun, 13 Feb 2011 14:44:01 -0800 (PST) Message-ID: <4D585EAB.4070100@codemonkey.ws> Date: Sun, 13 Feb 2011 16:43:55 -0600 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] KVM call minutes for Feb 8 References: <20110208155557.GM6198@x200.localdomain> <4D51B1C9.3080507@codemonkey.ws> <4D526D0D.9020507@codemonkey.ws> <4D52A86A.1030407@codemonkey.ws> <4D52F20A.7070009@codemonkey.ws> <4D539800.3070802@codemonkey.ws> <4D53BE22.3050706@redhat.com> <4D57FB12.5060703@codemonkey.ws> <4D57FF2E.7020001@redhat.com> <4D580D3E.3000300@codemonkey.ws> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Chris Wright , kvm@vger.kernel.org, Markus Armbruster , qemu-devel@nongnu.org, Blue Swirl , Avi Kivity On 02/13/2011 03:24 PM, Peter Maydell wrote: > On 13 February 2011 16:56, Anthony Liguori wrote: > >> If we can move away from Bus abstraction and to a simpler interface >> mechanism, then we can express peer relationships by just having bidirection >> references. IOW: >> >> -device cpus,northbridge=nb,id=cpus,count=16 -device i440fx,cpus=cpus >> >> I don't think modelling each CPU makes sense. We should probably just model >> all cpus in a single device for the sake of simplicity. >> > How would this work for systems with multiple CPUs which have different > views of the world? (ie their memory maps differ so that eg some RAM is > shared between them but some parts of the address space are different > RAM for the two cores, some devices one core only, some devices shared > between cores but the device can tell which core made an IO request) > With a bus-style abstraction this is straightforward: each core has its > own bus which is what defines its view of the world, some devices > and RAM are wired up to both buses. I'm not sure how the bidirectional > reference model would look for this? > Each core has it's own northbridge. You would do: -device arm-cpu,northbridge=nb1 -device dsp,northbridge=nb2 Or whatever. Regards, Anthony Liguori > (Real world examples would be if we ever had any need to actually > model any of the auxiliary cores in say an OMAP device, or the > M3 in a versatile-express. Yes, most systems won't look that odd > but it does come up, especially in testbench type designs, and our > interface abstraction should be able to handle it.) > > -- PMM > >