From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jeremy Fitzhardinge <jeremy@goop.org>
Subject: Re: Kernel BUG at arch/x86/mm/tlb.c:61
Date: Fri, 15 Apr 2011 14:22:29 -0700
Message-ID: <4DA8B715.9080508@goop.org>
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	<BLU157-w540B39FBA137B4D96278D2DAA90@phx.gbl>,
	<BANLkTimgh_iip27zkDPNV9r7miwbxHmdVg@mail.gmail.com>,
	<BANLkTimkMgYNyANcKiZu5tJTL4==zdP3xg@mail.gmail.com>,
	<BLU157-w116F1BB57ABFDE535C7851DAA80@phx.gbl>,
	<4DA3438A.6070503@goop.org>,
	<BLU157-w2C6CD57CEA345B8D115E8DAAB0@phx.gbl>,
	<BLU157-w36F4E0A7503A357C9DE6A3DAAB0@phx.gbl>,
	<20110412100000.GA15647@dumpdata.com>,
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	<BLU157-w383D1A2536480BCD4C0E0EDAAD0@phx.gbl>
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To: MaoXiaoyun <tinnycloud@hotmail.com>
Cc: xen devel <xen-devel@lists.xensource.com>, giamteckchoon@gmail.com, konrad.wilk@oracle.com
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On 04/15/2011 05:23 AM, MaoXiaoyun wrote:
> Hi=A3=BA
>
> Could the crash related to this patch ?
> http://git.kernel.org/?p=3Dlinux/kernel/git/jeremy/xen.git;a=3Dcommitdi=
ff;h=3D45bfd7bfc6cf32f8e60bb91b32349f0b5090eea3
>
> Since now TLB state change to TLBSTATE_OK(mmu_context.h:40) is before
> cpumask_clear_cpu(line 49).
> Could it possible that right after execute line 40 of mmu_context.h,
> CPU revice IPI from other CPU to
> flush the mm, and when in interrupt, find the TLB state happened to be
> TLBSTATE_OK. Which conflicts.

Does reverting it help?

J

>
> Thanks.
>
> arch/x86/include/asm/mmu_context.h
>
> 33 static inline void switch_mm(struct mm_struct *prev, struct
> mm_struct *next,
> 34 <+++<+++<+++ struct task_struct *tsk)
> 35 {
> 36 <+++unsigned cpu =3D smp_processor_id();
> 37
> 38 <+++if (likely(prev !=3D next)) {
> 39 #ifdef CONFIG_SMP
> 40 <+++<+++percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
> 41 <+++<+++percpu_write(cpu_tlbstate.active_mm, next);
> 42 #endif
> 43 <+++<+++cpumask_set_cpu(cpu, mm_cpumask(next));
> 44
> 45 <+++<+++/* Re-load page tables */
> 46 <+++<+++load_cr3(next->pgd);
> 47
> 48 <+++<+++/* stop flush ipis for the previous mm */
> 49 <+++<+++cpumask_clear_cpu(cpu, mm_cpumask(prev));
>
>