From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:37612) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QN8JL-0003bd-95 for qemu-devel@nongnu.org; Thu, 19 May 2011 14:51:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QN8JK-0006nP-2F for qemu-devel@nongnu.org; Thu, 19 May 2011 14:51:03 -0400 Received: from fmmailgate02.web.de ([217.72.192.227]:59682) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QN8JJ-0006nK-K5 for qemu-devel@nongnu.org; Thu, 19 May 2011 14:51:02 -0400 Message-ID: <4DD56693.2070602@web.de> Date: Thu, 19 May 2011 20:50:59 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <4DD3C5B9.1080908@redhat.com> <4DD3D236.90708@siemens.com> <4DD3D95E.2060105@redhat.com> <4DD3E1B3.3020405@siemens.com> <4DD3E610.1080201@siemens.com> <4DD4199E.2000702@codemonkey.ws> <4DD41DBB.2020108@web.de> <20110519082644.GC28399@redhat.com> <4DD4D53F.1090108@web.de> <4DD52082.1080804@codemonkey.ws> <4DD521C8.5020903@siemens.com> <4DD52363.7080201@codemonkey.ws> <4DD52526.3070909@redhat.com> <4DD55EDD.9000308@codemonkey.ws> In-Reply-To: <4DD55EDD.9000308@codemonkey.ws> Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enig3DD7E583C66A6C81A80450E1" Sender: jan.kiszka@web.de Subject: Re: [Qemu-devel] [RFC] Memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Peter Maydell , Avi Kivity , Gleb Natapov , qemu-devel This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enig3DD7E583C66A6C81A80450E1 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On 2011-05-19 20:18, Anthony Liguori wrote: > On 05/19/2011 09:11 AM, Avi Kivity wrote: >> On 05/19/2011 05:04 PM, Anthony Liguori wrote: >>> >>> Right, the chipset register is mainly used to program the contents of= >>> SMM. >>> >>> There is a single access pin that has effectively the same semantics >>> as setting the chipset register. >>> >>> It's not a per-CPU setting--that's the point. You can't have one CPU >>> reading SMM memory at the exactly same time as accessing VGA. >>> >>> But I guess you can never have two simultaneous accesses anyway so >>> perhaps it's splitting hairs :-) >> >> Exactly - it just works. >=20 > Well, not really. >=20 > kvm.ko has a global mapping of RAM regions and currently only allows > code execution from RAM. >=20 > This means the only way for QEMU to enable SMM support is to program th= e > global RAM regions table to enable allow RAM access for the VGA region.= >=20 > The problem with this is that it's perfectly conceivable to have CPU 0 > in SMM mode while CPU 1 is doing MMIO to the VGA planar. >=20 > The same problem exists with PAM. It would be much easier to implement= > PAM correctly in QEMU if it were possible to execute code via MMIO as w= e > could just mark the BIOS memory as non-RAM and deal with the dispatch > ourselves. If we already have to change KVM (I guess we have to), let's better add per-CPU memory slot support. That will allow to switch between VGA and SMRAM without costly dispatching. At this chance, I think we also need some support for half-MMIO (MMIO on write, RAM on read) for proper flash support. Jan --------------enig3DD7E583C66A6C81A80450E1 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.15 (GNU/Linux) Comment: Using GnuPG with SUSE - http://enigmail.mozdev.org/ iEYEARECAAYFAk3VZpMACgkQitSsb3rl5xQnKQCgtEevT+2EwUwRLxb3vm7S1oY0 PO8Anjppl7PnVIU2oEXa/Vh346K1AKKV =vorw -----END PGP SIGNATURE----- --------------enig3DD7E583C66A6C81A80450E1--