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From: Steve Calfee <stevecalfee@gmail.com>
To: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>,
	"Premi, Sanjeev" <premi@ti.com>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"Girdwood, Liam" <lrg@ti.com>
Subject: Re: beagleboardxm 2.6.39rc4 mcbsp problems.
Date: Fri, 20 May 2011 17:55:38 -0700	[thread overview]
Message-ID: <4DD70D8A.2090807@gmail.com> (raw)
In-Reply-To: <20110520092911.d725b9c4.jhnikula@gmail.com>

On 05/19/11 23:29, Jarkko Nikula wrote:
> On Thu, 19 May 2011 17:58:56 -0700
> Steve Calfee <stevecalfee@gmail.com> wrote:
> 
...
>>
> This very likely sounds that in master mode the master clock to McBSP is
> missing if there is no DMA running. Did you try to use internal 96 MHz
> from my example or did you try to use external CLKS what Pandora is
> using? That CLKS setup in Pandora requires that there is a clock coming
> to McBSP CLKS pin.
> 
> But as you got codec slave mode working it seems that pin multiplexing
> is ok so there is no need to try with master mode. In problematic cases
> the master mode is a good start since then only McBSP clock setup and
> pin multiplexing can affect if there are no clock and data signals
> visible.
> 

OK, you called this correctly. Apparently the beagle does not by default
have a clock on the clks pin. When I correctly followed your suggestion
and changed to the internal 96,000,000 clock I do get transitions on the
mcbsp1 clk and fsx pins.

The problem is 96M is pretty big. the only divisor I see is 8 bits, your
suggested division (else where of 62) only brings the bit clock rate to
about 15Mhz. the frame clock did get set very near the 8Khz for the
sample playback. So about 1900 bit clocks are sent per frame.

This would be ok, but since the mcbsp does not respect the l/r clock
(FSX) for shifting out data, I am back to getting audio on only one ear.
I was hoping that in master mode I could configure the mcbsp to only
send 16 bit clocks per frame. It looks like the clocks are not that
configurable.

The external clks pin is supposed to be connect to an external TPS65950
chip which divides down the source 26Mhz clock by 256. I'll have to
investigate why I was not seeing that clock.

Regards, Steve

  parent reply	other threads:[~2011-05-21  0:55 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-11 13:55 [PATCH] ASoC: omap-mcbsp: Remove restrictive checks for cpu type Sanjeev Premi
2011-05-11 13:55 ` Sanjeev Premi
2011-05-11 13:57 ` Mark Brown
2011-05-11 13:57   ` Mark Brown
2011-05-11 14:44 ` Peter Ujfalusi
2011-05-11 14:44   ` [alsa-devel] " Peter Ujfalusi
2011-05-11 15:38 ` Jarkko Nikula
2011-05-11 15:38   ` Jarkko Nikula
2011-05-11 18:16 ` [alsa-devel] " Steve Calfee
2011-05-11 19:19   ` Premi, Sanjeev
2011-05-11 21:31   ` beagleboardxm 2.6.39rc4 mcbsp problems Steve Calfee
2011-05-12  6:25     ` Jarkko Nikula
2011-05-12 11:01       ` Peter Ujfalusi
2011-05-12 18:43         ` Steve Calfee
2011-05-13  5:59           ` Peter Ujfalusi
2011-05-14  2:47             ` Steve Calfee
2011-05-16  8:54               ` Peter Ujfalusi
2011-05-16 18:07                 ` Steve Calfee
2011-05-17  6:37                   ` Jarkko Nikula
2011-05-19  1:06                     ` Steve Calfee
2011-05-20  0:58                       ` Steve Calfee
2011-05-20  6:29                         ` Jarkko Nikula
2011-05-20  7:03                           ` Peter Ujfalusi
2011-05-21  0:55                           ` Steve Calfee [this message]
2011-05-17 10:42                   ` Peter Ujfalusi
2011-05-19  0:30                     ` Steve Calfee
2011-05-19 11:28                       ` Peter Ujfalusi
2011-05-19 23:58                         ` Steve Calfee
2011-05-20  6:56                           ` Peter Ujfalusi
2011-05-13 12:13 ` [PATCH] ASoC: omap-mcbsp: Remove restrictive checks for cpu type Liam Girdwood
2011-05-13 12:13   ` Liam Girdwood

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