From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.windriver.com ([147.11.1.11]) by linuxtogo.org with esmtp (Exim 4.72) (envelope-from ) id 1QlitO-0005xS-7r for openembedded-core@lists.openembedded.org; Tue, 26 Jul 2011 16:45:54 +0200 Received: from ALA-HCA.corp.ad.wrs.com (ala-hca [147.11.189.40]) by mail.windriver.com (8.14.3/8.14.3) with ESMTP id p6QEfc5Q015744 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL) for ; Tue, 26 Jul 2011 07:41:38 -0700 (PDT) Received: from Macintosh-5.local (172.25.36.226) by ALA-HCA.corp.ad.wrs.com (147.11.189.50) with Microsoft SMTP Server id 14.1.255.0; Tue, 26 Jul 2011 07:41:38 -0700 Message-ID: <4E2ED221.3010705@windriver.com> Date: Tue, 26 Jul 2011 09:41:37 -0500 From: Mark Hatle Organization: Wind River Systems User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.6; rv:5.0) Gecko/20110624 Thunderbird/5.0 MIME-Version: 1.0 To: References: In-Reply-To: Subject: Re: [PATCH 2/3] Add basic Mips core tune config X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.11 Precedence: list Reply-To: Patches and discussions about the oe-core layer List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Jul 2011 14:45:54 -0000 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Few quick items here: On 7/26/11 7:44 AM, Richard Purdie wrote: > Signed-off-by: Richard Purdie > --- > meta/conf/machine/include/mips/arch-mips.inc | 64 +++++++++++++++++++++++++- > meta/conf/machine/include/tune-mips32.inc | 10 +++- > 2 files changed, 71 insertions(+), 3 deletions(-) > > diff --git a/meta/conf/machine/include/mips/arch-mips.inc b/meta/conf/machine/include/mips/arch-mips.inc > index f7f4eed..071e6b5 100644 > --- a/meta/conf/machine/include/mips/arch-mips.inc > +++ b/meta/conf/machine/include/mips/arch-mips.inc > @@ -1 +1,63 @@ ... > +# Floating point > +TUNEVALID[fpu-hard] = "Use hardware FPU" > +TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "fpu-hard", "-mhard-float", "-msoft-float", d)}" > +TARGET_FPU = "${@bb.utils.contains("TUNE_FEATURES", "fpu-hard", "", "soft", d)}" > + > +# Package naming > +MIPSPKGSFX_ENDIAN = "${@bb.utils.contains("TUNE_FEATURES", "bigendian", "", "el", d)}" > +MIPSPKGSFX_BYTE = "${@bb.utils.contains("TUNE_FEATURES", "n64" , "64", "", d)}" n32 is also MIPS64. so a: MIPSPKGSFX_BYTE .= "${@bb.utils.contains("TUNE_FEATURES", "n32" , "64", "", d)}" should fix the issue. > +TUNE_ARCH = "mips${MIPSPKGSFX_BYTE}${MIPSPKGSFX_ENDIAN}" > + > +# Base tunes > +AVAILTUNES += "mips mips64-n32 mips64 mipsel mips64el-n32 mips64el mips-nf mips64-nf-n32 mips64-nf mipsel-nf mips64el-nf-n32 mips64el-nf" > +TUNE_FEATURES_tune-mips = "o32 bigendian fpu-hard" > +BASE_LIB_tune-mips = "lib" > +TUNE_FEATURES_tune-mips64-n32 = "n32 bigendian fpu-hard" > +BASE_LIB_tune-mips64-n32 = "lib32" > +TUNE_FEATURES_tune-mips64 = "n64 bigendian fpu-hard" > +BASE_LIB_tune-mips64 = "lib64" > +TUNE_FEATURES_tune-mipsel = "o32 fpu-hard" > +BASE_LIB_tune-mipsel = "lib" > +TUNE_FEATURES_tune-mips64el-n32 = "n32 fpu-hard" > +BASE_LIB_tune-mips64el-n32 = "lib32" > +TUNE_FEATURES_tune-mips64el = "n64 fpu-hard" > +BASE_LIB_tune-mips64el = "lib64" > +TUNE_FEATURES_tune-mips-nf = "o32 bigendian" > +BASE_LIB_tune-mips-nf = "lib" > +TUNE_FEATURES_tune-mips64-nf-n32 = "n32 bigendian" > +BASE_LIB_tune-mips64-nf-n32 = "lib32" > +TUNE_FEATURES_tune-mips64-nf = "n64 bigendian" > +BASE_LIB_tune-mips64-nf = "lib64" > +TUNE_FEATURES_tune-mipsel-nf = "o32" > +BASE_LIB_tune-mipsel-nf = "lib" > +TUNE_FEATURES_tune-mips64el-nf-n32 = "n32" > +BASE_LIB_tune-mips64el-nf-n32 = "lib32" > +TUNE_FEATURES_tune-mips64el-nf = "n64" > +BASE_LIB_tune-mips64el-nf = "lib64" > + > diff --git a/meta/conf/machine/include/tune-mips32.inc b/meta/conf/machine/include/tune-mips32.inc > index 28b0047..1f913df 100644 > --- a/meta/conf/machine/include/tune-mips32.inc > +++ b/meta/conf/machine/include/tune-mips32.inc > @@ -1,4 +1,10 @@ > +DEFAULTTUNE ?= "mips32" > + > require conf/machine/include/mips/arch-mips.inc > > -TUNE_CCARGS = "-march=mips32" > -TUNE_PKGARCH = "mips" > +TUNEVALID[mips32] = "Enable mips32 specific processor optimizations" If tune-mips32 is used, then all of the n32 and n64 variants are not possible. Do we have a way to specify that? Perhaps using the TUNECONFLICT? > +TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "mips32", "-march=mips32", "", d)}" > + > +AVAILTUNES += "mips32" > +TUNE_FEATURES_tune-mips32 = "${TUNE_FEATURES_tune-mips} mips32" > +PACKAGE_EXTRA_ARCHS_tune-mips32 = "mips"