From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:38133) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QmS8w-0003pA-Hr for qemu-devel@nongnu.org; Thu, 28 Jul 2011 11:04:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QmS8v-0004Ss-H5 for qemu-devel@nongnu.org; Thu, 28 Jul 2011 11:04:58 -0400 Received: from mail-gx0-f173.google.com ([209.85.161.173]:60932) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QmS8v-0004Sl-D1 for qemu-devel@nongnu.org; Thu, 28 Jul 2011 11:04:57 -0400 Received: by gxk26 with SMTP id 26so2238480gxk.4 for ; Thu, 28 Jul 2011 08:04:56 -0700 (PDT) Message-ID: <4E317A96.7000604@codemonkey.ws> Date: Thu, 28 Jul 2011 10:04:54 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <1311558293-5855-1-git-send-email-aliguori@us.ibm.com> <4E2EBA1E.90006@redhat.com> <4E2EC90E.8090409@codemonkey.ws> <4E2ED0AA.3020101@redhat.com> <4E2EDE86.7020807@codemonkey.ws> <4E2F06C8.30403@redhat.com> <4E2F1448.3040106@codemonkey.ws> <4E2FD28F.2070206@redhat.com> <4E30091C.3070404@codemonkey.ws> <4E302FBF.4040500@redhat.com> <4E303CBF.8070801@codemonkey.ws> <4E305E3F.2050405@redhat.com> <4E306EA5.5020207@codemonkey.ws> <4E311160.8060506@redhat.com> <4E315A3F.90804@codemonkey.ws> <4E316924.8020001@redhat.com> <4E316C36.1050405@codemonkey.ws> <4E317514.30505@redhat.com> In-Reply-To: <4E317514.30505@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC][PATCH 0/21] QEMU Object Model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: Peter Maydell , qemu-devel@nongnu.org On 07/28/2011 09:41 AM, Paolo Bonzini wrote: > On 07/28/2011 04:03 PM, Anthony Liguori wrote: >>> No doubt about that. :) I'd put a lot more hope into Goldfish though. >> >> What's unclear to me about the Goldfish enumerator is whether it should >> be filled out through interaction with hardware devices or via some >> other mechanism. >> >> In many ways, it's similar to ACPI and a Device Tree. In both of those >> cases, firmware actually is responsible for constructing those tables. > > Yes, it is a flat device tree. > > Since it supports hotplug (at least in theory, the Android emulator > predates qdev so it doesn't support it), I would say it is more similar > to PCI configuration space. The difference is that IRQ numbers and MMIO > base addresses are handed out by hardware (by a piece of the SoC) rather > than by the firmware. > > So yes, the hardware would have some kind of bus to talk to the devices > and arbitrate hotplug/hotunplug. The only peculiarity being that the bus > enumerator hardcodes itself in the list it exposes, in addition to the > devices on the bus. > > But that still means that the devices have two views: > > 1) the enumerator's view is either "this is my name, my MMIO base, my > IRQ base" or "I need 4k of MMIO and 1 IRQ line, please tell me > where/which are those", depending on the device; I think it's important to ask, how would this be implemented in hardware. The only way I can see is to teach each device about this interface and then have a common bus. That implies that you have: class GoldfishEnumerator : public Device { GoldfishDevice *slots[N]; }; interface GoldfishDevice { const char *get_name(); uint64_t get_mmio_base(); ... }; class GoldfishNic : public Device, implements GoldfishDevice { const char *get_name(void) { return "nic"; } }; With respect to hotplug, that means that you have to hot plug the device to multiple busses. > 2) the PIC's view is "please bring this IRQ line up/down" (the device > says which line, since the enumerator can assign those dynamically). > > The PIC's view is more complicated than a Pin, and more similar to ISA. ISA is just a pin. The ISA bus extender literally has five pins corresponding to the ISA IRQs 7, 6, 5, 4, 3. EISA adds 5 more pins for 10, 11, 12, 14, 15. ISA devices "choose" their IRQ line by hardwiring their IRQ output pin to a specific IRQ line on the bus. Regards, Anthony Liguori > > Paolo >