From mboxrd@z Thu Jan  1 00:00:00 1970
From: Nick Thompson <nick.thompson@ge.com>
Date: Mon, 12 Sep 2011 13:55:45 +0100
Subject: [U-Boot] Bottleneck of NAND copy speed
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On 12/09/11 12:21, Simon Schwarz wrote:
> Hi List,
>
> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
> my SPL.
>
> I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET 
> NAND-Flash on the devkit8000 (OMAP3).
>
>  From the timings I set on the GPMC I calced a max. speed of around 26 
> MiB/s. In my measurements I have a speed of around 10 MiB/s.
>
> Here is the image of my the calculation:
> https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US
>
> tcmd: The time for the initial read command
> twr: time to write the address
> tDn: Time for a 16bit read of Data
>
> Does anyone has an idea where the bottleneck could be? Is my calculation 
> wrong?
> (ecc is done parallel to the DMA transfer).

I only had a quick look at your calculation, but didn't notice anything to account
for the NAND copy to read cache (data ready) time of the NAND device.

Nick.