From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 04 Jan 2012 15:04:18 +0100 Subject: [U-Boot] [PATCH V12 08/14] Add cache functions to SPL for armv7 In-Reply-To: <4F045B0D.8040301@gmail.com> References: <1324049833-18143-1-git-send-email-sbabic@denx.de> <1325665518-9410-1-git-send-email-sbabic@denx.de> <1325665518-9410-9-git-send-email-sbabic@denx.de> <4F043910.3070704@ti.com> <4F045280.9030202@denx.de> <4F045B0D.8040301@gmail.com> Message-ID: <4F045C62.2020609@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 04/01/2012 14:58, Simon Schwarz wrote: > Hi Stefano, > Hi Simon, > Just FYI: I already did this with DMA - the patch was rejected and I > haven't worked on it since (as you already said it is some work...). Yes, of course - it makes sense to find a solution that will be accepted before implementing it - this is the reason I prepared a way to enable caches, but I have not yet done and I will not do if this solution will be rejected. > It > was really speeding up the copy process. I am sure it is a big improvement... > I have some meassurments on > this and it would be really interesting to compare them with the d-cache > solution. > > If you are interested I can send you my data - so you can compare it > when you have d-cache ready. Ok, understood. Let's see if we can merge soon the patchset into mainline - that opens also the possibility to add further SOCs, not only TI. And then we can proceed optimizing with DMA or d-cache. Best regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================