From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:33981) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7sst-00084Z-Ft for qemu-devel@nongnu.org; Wed, 14 Mar 2012 14:25:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7sso-0002V9-Fy for qemu-devel@nongnu.org; Wed, 14 Mar 2012 14:25:15 -0400 Received: from cantor2.suse.de ([195.135.220.15]:53089 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7sso-0002Uv-6m for qemu-devel@nongnu.org; Wed, 14 Mar 2012 14:25:10 -0400 Message-ID: <4F60E284.5080007@suse.de> Date: Wed, 14 Mar 2012 19:25:08 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331740900-5637-1-git-send-email-afaerber@suse.de> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 00/12] QOM'ify SuperH CPU and SH7750 SoC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Anthony Liguori , Paolo Bonzini , qemu-devel@nongnu.org, =?UTF-8?B?QXVyw6lsaWVuIEphcm5v?= Am 14.03.2012 17:06, schrieb Peter Maydell: > On 14 March 2012 16:01, Andreas F=C3=A4rber wrote: >> Based on qom-cpu v4 and object_class_get_list() v2, this series conver= ts >> the SuperH CPU to QOM. >> >> The SH7750 SoC code invited to do some cleanups, making use of the Sup= erHCPU, >> so I've QOM'ified the SoC and added the CPU as a link for n= ow. >> >> I'm not so happy about the link construct, so it may need to be redone >> as a SysBus device with qdev properties >=20 > Shouldn't the CPU be a child of the SoC, not a link? Exactly. Issue was twofold: 1) There is no object_property_set_child(), and using object_property_add_child() in the machine for the SoC seemed wrong. Setting the link target allowed to set the field in the state struct via QOM without reintroducing qdev pointer properties. 2) The SH7750 SoC is expected to have one of three user-selectable CPU cores (SH7750, SH7750R and SH7751 iirc) and this somewhat violates the layering. Making it a SysBus device with a string property to tunnel through the cpu_model is what I'm referring to below for v2. >> - long-term I'd like to have a >> "system-on-chip" type derived from TYPE_DEVICE. Deriving it from >> TYPE_SYS_BUS_DEVICE might make for a better v2. >=20 > I think TYPE_SYS_BUS_DEVICE should go away in favour of everything > being a TYPE_DEVICE. >=20 > What do you think a "system-on-chip" type would be needed for? > I would have expected that SoCs would basically just be "containers" > of devices and directly be TYPE_DEVICEs... I was thinking that SoCs should have a fixed relation to particular CPU core(s). -cpu exynos4210 would then select CPUs+x, we therefore need to type-check it, and only features (NEON) etc. would be tweakable via QOM. As opposed to having a fixed SoC like this one here and trying to fiddle with its internals. In particular I have decoupling of SoC from machine in mind: for Tegra2 I have tegra2.c defining a "tegra2-soc" type and am preparing an "ac100" machine in tegra2_boards.c that trivially does an object_new(TYPE_TEGRA2) that in turn instantiates all the SoC-level SysBus devices in its initfn. So, I think CPUs, and SoCs as CPU parent, are a special case of device. Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg