From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Nelson Date: Wed, 14 Mar 2012 14:04:32 -0700 Subject: [U-Boot] [PATCH V3] net: fec_mxc: allow use with cache enabled In-Reply-To: <201203141633.41447.vapier@gentoo.org> References: <201203140141.23737.vapier@gentoo.org> <4F60ED8A.8090400@boundarydevices.com> <201203141633.41447.vapier@gentoo.org> Message-ID: <4F6107E0.2020501@boundarydevices.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03/14/2012 01:33 PM, Mike Frysinger wrote: > On Wednesday 14 March 2012 15:12:10 Eric Nelson wrote: >> On 03/13/2012 10:41 PM, Mike Frysinger wrote: >>> On Wednesday 14 March 2012 01:12:38 Eric Nelson wrote: >>>> Most of the PPC devices seem to have values of 16 or 32 >>>> for ARCH_DMA_MINALIGN, but PPC64BRIDGE and E500MC would >>>> have a problem if their drivers don't implement a bounce >>>> buffer because PKTALIGN< ARCH_DMA_MINALIGN. >>>> >>>> (see arch/powerpc/include/asm/cache.h) >>>> >>>> This condition is properly tested for in fec_mxc.c. >>> >>> so fix this in common code instead of hacking around it in individual >>> drivers. seems to me that PKTALIGN should be defined to >>> ARCH_DMA_MINALIGN and ultimately removed. >> >> I'm not in a position to test against MAKEALL, but it appears that all >> architectures have cache.h and define ARCH_DMA_MINALIGN > > ARCH_DMA_MINALIGN is required. if an arch/board omits it, they are broken and > you need not worry about it. we already have common code requiring int. > Sounds good. >> --- a/include/net.h >> +++ b/include/net.h >> >> -#define PKTALIGN 32 >> +#define PKTALIGN ARCH_DMA_MINALIGN > > looks fine to me > -mike You want I should send a formal patch? Should I consider "looks fine" to be an ack? If so, I'll also send an update (V5) to fec_mxc that removes the check on PKTALIGN. Please advise, Eric