From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver Date: Thu, 26 Apr 2012 13:51:28 -0600 Message-ID: <4F99A740.3080407@wwwdotorg.org> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1335352072-4001-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Hiroshi DOYU Cc: swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Felipe Balbi , Arnd Bergmann , Grant Likely , Rob Herring , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 04/25/2012 05:07 AM, Hiroshi DOYU wrote: > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > High-performance Bus (AHB) architecture. > > The AHB Arbiter controls AHB bus master arbitration. This effectively > forms a second level of arbitration for access to the memory > controller through the AHB Slave Memory device. The AHB pre-fetch > logic can be configured to enhance performance for devices doing > sequential access. Each AHB master is assigned to either the high or > low priority bin. Both Tegra20/30 have this AHB bus. > > Some of configuration param could be passed from DT too. I think this code looks reasonable. I'd like to see an ack from Russell, Arnd, and Olof on the final location of the files though. I note that MAINTAINERS doesn't have an entry for drivers/platform/ (except x86/ sub-dir) or drivers/platform/arm/. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758719Ab2DZTve (ORCPT ); Thu, 26 Apr 2012 15:51:34 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:55131 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752622Ab2DZTvd (ORCPT ); Thu, 26 Apr 2012 15:51:33 -0400 Message-ID: <4F99A740.3080407@wwwdotorg.org> Date: Thu, 26 Apr 2012 13:51:28 -0600 From: Stephen Warren User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.28) Gecko/20120313 Thunderbird/3.1.20 MIME-Version: 1.0 To: Hiroshi DOYU CC: swarren@nvidia.com, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Felipe Balbi , Arnd Bergmann , Grant Likely , Rob Herring , linux-kernel@vger.kernel.org, devicetree-discuss@lists.ozlabs.org Subject: Re: [PATCHv3 1/4] ARM: tegra: Add AHB driver References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> In-Reply-To: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/25/2012 05:07 AM, Hiroshi DOYU wrote: > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > High-performance Bus (AHB) architecture. > > The AHB Arbiter controls AHB bus master arbitration. This effectively > forms a second level of arbitration for access to the memory > controller through the AHB Slave Memory device. The AHB pre-fetch > logic can be configured to enhance performance for devices doing > sequential access. Each AHB master is assigned to either the high or > low priority bin. Both Tegra20/30 have this AHB bus. > > Some of configuration param could be passed from DT too. I think this code looks reasonable. I'd like to see an ack from Russell, Arnd, and Olof on the final location of the files though. I note that MAINTAINERS doesn't have an entry for drivers/platform/ (except x86/ sub-dir) or drivers/platform/arm/. From mboxrd@z Thu Jan 1 00:00:00 1970 From: swarren@wwwdotorg.org (Stephen Warren) Date: Thu, 26 Apr 2012 13:51:28 -0600 Subject: [PATCHv3 1/4] ARM: tegra: Add AHB driver In-Reply-To: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> References: <1335352072-4001-1-git-send-email-hdoyu@nvidia.com> Message-ID: <4F99A740.3080407@wwwdotorg.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 04/25/2012 05:07 AM, Hiroshi DOYU wrote: > The AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced > High-performance Bus (AHB) architecture. > > The AHB Arbiter controls AHB bus master arbitration. This effectively > forms a second level of arbitration for access to the memory > controller through the AHB Slave Memory device. The AHB pre-fetch > logic can be configured to enhance performance for devices doing > sequential access. Each AHB master is assigned to either the high or > low priority bin. Both Tegra20/30 have this AHB bus. > > Some of configuration param could be passed from DT too. I think this code looks reasonable. I'd like to see an ack from Russell, Arnd, and Olof on the final location of the files though. I note that MAINTAINERS doesn't have an entry for drivers/platform/ (except x86/ sub-dir) or drivers/platform/arm/.