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From: Alex Shi <alex.shi@intel.com>
To: Borislav Petkov <bp@amd64.org>
Cc: andi.kleen@intel.com, tim.c.chen@linux.intel.com,
	jeremy@goop.org, chrisw@sous-sol.org, akataria@vmware.com,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	rostedt@goodmis.org, fweisbec@gmail.com, riel@redhat.com,
	luto@mit.edu, avi@redhat.com, len.brown@intel.com,
	paul.gortmaker@windriver.com, dhowells@redhat.com,
	fenghua.yu@intel.com, yinghai@kernel.org, cpw@sgi.com,
	steiner@sgi.com, linux-kernel@vger.kernel.org,
	yongjie.ren@intel.com
Subject: Re: [PATCH 2/3] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
Date: Thu, 03 May 2012 17:15:19 +0800	[thread overview]
Message-ID: <4FA24CA7.2070107@intel.com> (raw)
In-Reply-To: <20120502134441.GF12914@aftab.osrc.amd.com>

On 05/02/2012 09:44 PM, Borislav Petkov wrote:

> On Wed, May 02, 2012 at 07:38:47PM +0800, Alex Shi wrote:
>>> Are you saying you want to have this setting per family?
>>
>> Set it according to CPU type is more precise, but looks ugly.
> 
> By "CPU type" do you mean microarchitecture here?


Yes.

> 
>> I am wondering if it worth to do. Maybe conservative selection is
>> acceptable?
> 
> Well, as I said earlier, I'd run it on a couple of different machines
> and make FLUSHALL_BAR configurable from userspace - this way you have
> real, solid data instead of guessing the exact number.


Consider different CPU type has different balance point, I has another
patch will add a interface for tuning.

> 
>>> Also, have you run your patches with other benchmarks beside your
>>> microbenchmark, say kernbench, SPEC<something>, i.e. some other
>>> multithreaded benchmark touching shared memory? Are you seeing any
>>> improvement there?
>>
>> I tested oltp reading and specjbb2005 with openjdk. They should not much
>> flush_tlb_range calling. So, no clear improvement.
>> Do you know benchmarks which cause enough flush_tlb_range?
> 
> Not really. Probably get a couple of benchmarks and count
> flush_tlb_range calls with trace_printk or perf probe? :-)


perf probe is enough. :)

  reply	other threads:[~2012-05-03  9:16 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-28  8:51 [PATCH 0/3] TLB flush range optimization Alex Shi
2012-04-28  8:51 ` [PATCH 1/3] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-04-29 13:55   ` Borislav Petkov
2012-04-30  4:25     ` Alex Shi
2012-04-30 10:45       ` Borislav Petkov
2012-04-28  8:51 ` [PATCH 2/3] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-04-30 10:54   ` Borislav Petkov
2012-05-02  9:24     ` Alex Shi
2012-05-02  9:38       ` Borislav Petkov
2012-05-02 11:38         ` Alex Shi
2012-05-02 13:04           ` Nick Piggin
2012-05-02 13:15             ` Alex Shi
2012-05-02 13:24             ` Alex Shi
2012-05-06  2:55             ` Alex Shi
2012-05-02 13:44           ` Borislav Petkov
2012-05-03  9:15             ` Alex Shi [this message]
2012-05-04  2:24   ` Ren, Yongjie
2012-05-04  5:46     ` Alex Shi
2012-04-28  8:51 ` [PATCH 3/3] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
  -- strict thread matches above, loose matches on Subject: below --
2012-04-28  8:50 [PATCH 1/3] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-04-28  8:50 ` [PATCH 2/3] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-05-02 15:21   ` Rik van Riel

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