From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Thu, 28 Jun 2012 16:01:17 -0700 Subject: [U-Boot] [PATCH v4 3/6] mcx: Disable DCACHE since USB EHCI is enabled In-Reply-To: <201206290036.59321.marex@denx.de> References: <1340209283-3404-1-git-send-email-trini@ti.com> <201206290001.59060.marex@denx.de> <20120628223454.GA596@bill-the-cat> <201206290036.59321.marex@denx.de> Message-ID: <4FECE23D.8000003@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 06/28/2012 03:36 PM, Marek Vasut wrote: > Dear Tom Rini, > >> On Fri, Jun 29, 2012 at 12:01:58AM +0200, Marek Vasut wrote: >>> Dear Tom Rini, >>> >>>> On 06/28/2012 07:37 AM, Marek Vasut wrote: >>>>> Dear Ilya Yanok, >>>>> >>>>>> Dear Marek, >>>>>> >>>>>> 28.06.2012 02:48, Marek Vasut wrote: >>>>>>>> Sorry for missing this discussion. I think compile-time disabling >>>>>>>> of the cache is too brutal. >>>>>>>> ehci-hcd cache handling is broken anyway: doing unaligned >>>>>>>> flushes/invalidates is a bug, and we know for sure that upper >>>>>>>> layers don't care about alignment (and I bet ehci-hcd does this >>>>>>>> even for its internal buffers). So what's the point in all this >>>>>>>> cache handling in ehci-hcd? It's not going to work anyway and >>>>>>>> just produces problems. So I suggest to just disable all this >>>>>>>> stuff until generic code will be fixed. Alternatively we can do >>>>>>>> bounce-buffering inside driver. >>>>>>> >>>>>>> We should rather introduce generic bounce buffer. But the upper >>>>>>> layers are getting fixed recently so we should be getting there. >>>>>> >>>>>> Really? Don't forget my old patch [1] then ;) >>>>>> Still I think we should rip off all the cache stuff from ehci-hcd >>>>>> until all patches for upper layers are included. Again, this stuff >>>>>> doesn't do proper things now anyway and USB won't work with dcache >>>>>> enabled. >>>>> >>>>> Have you tested? I enabled dcache on m28 and tried asix ethernet >>>>> (needed a patch) and loading from ext2 and vfat (worked). >>>> >>>> So then we have more places that accidentially aligned to 32bytes since >>>> this does not work on TI parts which require 64byte alignment. >>> >>> Oh, this is very good it's broken. People actually started whining. Now >>> we have to wait until they start identifying the problematic places and >>> fixing them. >> >> Uh-hunh. So I guess for v2012.07 we'll build-time disable dcache for >> beagle and omap3_evm > > Didn't you fix the issues? > >> and leave it on for mcx and see who has time and >> hardware to fix things for v2012.10. > > Or we fix it for mcx too until .07 is out ? To clarify for everyone, the first part of this series fixes some alignment issues for things that were not starting address aligned. There still exist end-address alignment issues within ehci-hcd. The time I have for this problem right now boils down to disable dcache for these boards so that USB is still functional. -- Tom